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li ni u

Vi nhng u im hn hn ca tn hiu s so vi tn hiu tng t nh kh nng chng sai s(li), sa sai s hiu qu, kh nng tch hp ln ca cc thit b nn xu hng s ho ngy cng pht trin mnh m. Ngy ny trong cc mng vin thng ang tn ti song song c hai h thng tng t v h thng s, do cn phi c qu trnh bin i tn hiu tng t sang s v ngc li s tng t. Cc qu trnh c thc hin bi cc b bin i tng t s(ADC Analog to Digital Converter) v b bin i s tng t(DAC Digital to Analog Converter). Bi tiu lun ny trnh by ngn gn cc b bin i tn hiu tng t sang s, v mt s loi sai s thng xy ra trong qu trnh bin i cng vi phng php kim tra.

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1. Gii thiu.
Cc b bin i tng t- s, thng n ti l A/D (ADC) c vai tr ngy cng quan trng trong vic trang b my o trong nhng nm qua. C khi chc nng quan trng ca my o c bn nh l vn mt s, by gi ADC nm trong trung tm nhiu dng c phc tp nh xyl v b phn tch ph. Trong nhiu trng hp c tnh bn ngoi ca dng c b hn ch bi ch tiu cht lng bn trong b bin i A/D. Cng c s quan trng ca ADC i vi my o c thc hin bi cng ngh mch t hp (IC) ch tiu cht lng cao. N cho php b bin i tc cao v phn gii cao hn c thit k, sn xut v bn vi gi ph hp. Cng ngh IC tin tin quan trng ngang bng cho php b vi x l kh nng x l tn hiu s nhanh m cn thit trong vic cung cp s thay i gi thp t d liu gc to ra bi ADC n kt qu my o. Chc nng c bn ca b bin i A/D l bin i gi tr tng t ( in hnh biu din bi in p) thnh cc bt nh phn m cho php tnh xp x tt i vi gi tr tng t . V quan nim nhn thc ( Nu khong ni v vt l hc), s x l nay c th c xem nh l to ra t s gia tn hiu in p vo v in p tham chiu bit Vref sau lm trn kt qu ti gn gi tr nguyn nh phn n-bt nht. V mt ton hc, qu trnh x l c th c biu din bi :
V D = rnd in 2 n V ref

(1)

Trong Vin l tr s tng t ( y gi nh cho php di t 0 n Vref ), D l t u ra d liu, v n l phn gii ca b bin i ( s cc bt trong D). Hm rnd i din cho s lm trn ca cc t trong du ngoc i vi gi tr nguyn gn nht. Mt cch in hnh, in p thm chiu c sinh ra bn trong bi b bin i c tnh cch thng mi. Trong cc trng hp n c bn ngoi cung cp. Cn trng hp khc in p tham chiu cn phi t ti di u vo trong phm vi y ca b bin i.

2. B bin i tng t s tch phn (Integrating Analog-to-Digital Converters).

B bin i ADC tch hp c dng khi yu cu phn gii rt cao ti tc ly mu tng i thp. N lm chc nng 2

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bng cch tch hp (ly trung bnh) tn hiu u vo qua chu k thi gian c chn v v th thng s dng cho cng tc o cc in p DC. S ly trung bnh c hiu ng ca suy gim nhiu u vo. Nu thi gian trung bnh c chn lm mt hoc nhiu chu k ng dy in lc(power line cycles), giao din ng dy in lc c loi b t php o. N c ng dng rng ri trong vn mt s, m n li dng phn gii tip sng (receptional), tuyn tnh, tnh n nh, v cch loi tr nhiu ca Cu trc tch phn. 2.1.Cu trc hai sn dc(Dual Slope Architecture). Phng php hai sn dc c l c s dng kin trc A/D tch phn mt cch rng ri nht (hnh 1). C hai na chu k, da vo y c sn dcln v sn dcxung. Tn hiu vo c tch hp trong thi gian sn dcln i vi thi gian n nh. Sau tham chiu ca tn hiu ngc c tch hp trong thi gian sn dc xung bin i u vo b tch phn thnh zero. Thi gian cn thit cho sn dc xung t l vi tr s u vo v l u ra ca ADC. V mt ton hc, chu trnh sn dcln c th c trnh by nh sau:
Vp = Tup Vin RC

(2)
C R Vra

Vin
+ -

Vref

Hnh 1. S khi ADC hai sn dc n gin.

Vout Vp Vin tch phn Vref tch phn Tup Tdn thi gian

Hnh 2. Dng sng ADC hai sn dc in hnh. 3

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Trong khi Vp l gi tr nh t ti u ra b tch phn trong thi gian sn dc ln, Tup c bit l thi gian tch hp sn dc ln, Vin l tn hiu u vo, R v C l gi tr thnh phn ca b tch phn. Tng t sn dcxung c th trnh by bi:
Vp = Tdn Vref RC

(3)

Trong Tdn l thi gian khng bit trc ca sn dcxung, v Vref l gi tr tham kho, biu thc 2 v 3 v gii ra T dn, u ra ca ADC:
Tdn = Tup Vin Vref

(4)

Ch y l Vin v Vref lun lun l tn hiu ngc ( m bo s bin i thnh zero trong b tch phn), v do Tdn lun lun l dng. C th trc tip thy trong biu thc (4) rng R v C khng c mt trong Tdn . Do gi tr ca n khng ti hn. y l kt qu ca cng thnh phn c dng cho c sn dc ln v xung. Tng t, nu thi gian Tup v Tdn c xc nh bi chu k m ca ng h n, chu k chnh xc ca ng h s khng nh hng n chnh xc ca ADC. Pht biu li u ra ni ti s chu k ca ng h:
N dn = N up N in V ref

(5)

Trong Nup l s chu k ng h c n nh dng trong sn dcln v Ndn l s chu k ng h yu cu bin i u ra b tch phn thnh 0. Cc ngun sai s in th. R rng t biu thc (5) thy rng Ndn, u ra bng s ca ADC, ch ph thuc vo u vo, gi tr tham chiu, v gi tr khng bit trc Nnp,, sai s trong Vref s nh hng ti chnh xc h s khuch i ca ADC, nhng l n(implicit) trong nhng b bin i. Sai s b c th xut hin nu in p ti im bt u ca sn dcln khc vi in p ti im cui ca sn dcxung. Nu b so snh n trn u ra ca b tch phn c dng xc nh thi gian o (crossing) 0 trong c hai ng dc, s b ca n s khng quan trng. D th no th sai s b c th xy ra v vai tr loi tr (charge infection) t cng tc chn u 4

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vo v tham chiu. Trong ng dng vn mt c chnh xc rt cao, s b ny thng c b bi chu trnh t tr v khng (autozero cycle). Tnh tuyn tnh ca b bin i c th b nh hng bi hiu ng nh (memory) trong t in ca b so snh. y l do hin tng gi l hp th in mi, m in tch (charge) c hp th mt cch hiu dng bi in mi t trong khong thi gian l sng(exposure) di ti mt in p v sau quay ti phin t khi m in p khc c s dng. Cch la chn vt liu in mi c hp th rt thp dng ti thiu hiu ng ny. S cn i tc phn gii. Thi gian tch hp sn dc ln c th c dng xc nh chu k ng h mt cch chnh xc. D th no th thi gian bin i u ra ca b tch phn thnh 0 khng phi l s nguyn thc s ca chu k ng h, khi Vin c th gi nh bng bt k gi tr no. Thc ra, lun lun c s khng chnh xc s m (count) +-1 m Ndn c th din t c Vin. phn gii ca hai sn dc ADC c mt s m (count) trong Nmax, khi Nmax l s m tch lu trong sn dc sau khi tch hp u vo c thang y Vin=Vts. Da trn biu thc (5).
N max = N up N ts V ref

(6)

ci thin phn gii, Nmax phi c tng ln. Vic c th lm c bng cch tng Nup , c gi tr hiu ng thi gian tng tuyn tnh yu cu cho c hai sn dcln v xung. Hoc Vref phi gim, do thi gian sn dc ln l hng s thi gain sn dc xung tng tuyn tnh. Mt khc, phn gii tng yu cu s tng tuyn tnh trong s chu k ng h ca s bin i. Gi s gii hn thc tin chu k ng h ti thiu, phn gii tng ti mc tn km trc tip ca thi gian bin i. Vn ny c ngha quan trng c th c lm du bt bng cch s dng cu trc a sn dc. 2.2. Cu trc a sn dc (Multislope Architecture). S khi ca ADC nhiu sn dcin hnh cho trong hnh(3). N khc bit t phng php hai sn dc m c cc in tr tch hp ln v xung ring bit, v hn na c gi tr bi s cho cc in tr tch hp sn dc xung. S dng cc in tr khc nhau cho phn chia sn dc ln v xung gii thiu kh nng ca sai s do s khng thch ng ca in tr. Hai sn dc c min tr i vi vn ny khi 5

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duy nht in tr c dng. D th no th mng s in tr cht lng cao vi s ng chnh nhit tt v tnh tuyn tnh c th khc phc s bt li ny. u im ca cu trc a sn dc gim i ti thi gian bin i hoc tng ln ti phn gii. S suy gim quan trong ti thi gian bin i c th nhn c trc ht bng cch lm gim nh ng k Rup (niRti Vin). Dng np b tch phn s tng, s u p dng di ng ca b tch phn trong thi gian nh.
Rdn 10 Rdn 100Rdn

Vin
+ + -

Vref Vref Vout

-

Vref

Hnh 3. S khi ADC a sn dc Tip theo, thi gian yu cu cho sn dc ti phn gii cho trc c th c gim bt bng cch thc hin sn dc xung c bi s, mi mt ci ti dng thp lin tip (hnh 4). Trong v d hnh 4, dng xung u tin ngc du vi u vo, v ln ng k m b tch phn s vt qua 0 nh hn 10 s m(count). Khi u ra ca b tch phn vt qu 0, dng c tt ti chuyn tip ng h tip theo. Lng m b tch phn qu mc zero da trn in p u vo chnh xc. s ho phn cn li (residue) chnh xc, mt giy, thp hn 10 ln, cn phi chn dng sn dc xung ngc du. Mt ln na qu mc t l vi u vo nhng by gi s c bin thp hn 10 ln v sn dc thp hn. S m (counts) tch lu trong pha ca sn dcxung ny c chp nhn 10 ln thp hn. Mt lng khng xc nh ca sn dc xung ny c th c ng dng lin tip, mi mt ng dng ny thm (trong v dng Vout ny) mt chc i vi phn gii nhng to s phn trm rt nh i vi tonV b thi gian bin /R tch Phng php a sn i. hp Vin up p dc(Multislope) c th c /R tch hin vi mt chc bc trong d Vref thc hp d n dc xung trnh by y, hoc vi cc t s khc. Cho d Vref /10Rdn tng thm trong phn gii cref /100Rdnnhn c bng cch ng th V dng chu k ln ca a sn dc(multislope), m trong c u vo v dng tham chiu dch chuyn c ng dng. Tm li
thi gian Tup Tdn1

Tdn2

Tdn3

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phng php a sn dc lm ci thin mt cch n tng trong s cn i tc phn gii so vi cu trc hai sn dc bnh thng, vi mc tn km ca s phc tp v cn thit cho in tr c thch ng tt.

Hnh 4. Dng sng ADC a sn dc in hnh.

3. B bin i tng ts song song (Parallel Analog-To-Digital Converters).

ADC song song c dng trong ng dng ni m cn thit phi c rng bng v tc ly mu rt cao, cng vi phn gii trung bnh c th chp nhn c. Mt ng dng in hnh l xyl s thi gian thc(real-time), m c th thu thp tt c cc thng tin ca tn hiu trong trng hp n. ADC cng c dng trong xyl s lp li, nhng khng cn tc ly mu thi gian thc cao. 3.1.B bin i tc thi (Flash Converters). Loi quen thuc nht ca b bin i A/D song song l b bin i tc thi (flash). Gi nh vy l v b so snh c ghi thi gian 2n ly mu dng sng mt cch ng thi (trong n l phn gii b bin i). Mi mt b so snh c cung cp vi in p ngng khc nhau, c to ra bi b chia in tr t in p tham chiu b bin i chnh. Cc ngng ny cng nhau nhy (span) di u vo ca b bin i. Cc bt u ra t cc b so snh to m nhit k, gi nh th v n c th c biu din nh mt ct s 1 lin tc di chui 0 tng t (hnh 6). S chuyn tip t 1 n 0 tun t ch ra gi tr tn hiu u vo c ly mu. S chuyn tip ny c th tm thy vi cng logic bnh thng, kt qu l m 1 of N (trong N=2n), khi duy nht mt bt l mt. M 1 of N sau c th c m ho thm vi logic thng xui(straightforword) thnh m nh phn n bt, l u ra mong mun ca b bin i.

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B bin i tc thi c tc rt l nhanh, khi tc ca b so snh c ghi thi gian v logic c th thc s cao. iu ny lm chng ph hp vi ng dng xyl thi gian thc(real - time oscilloscope). D th no th cng c tn ti rt nhiu bt li. S phc tp ca mch in tng nhanh khi phn gii b tng khi c 2n b so snh ghi thi gian. Hn na, nng lng, in dung u vo, in dung ng h, v phm vi vt l ca mng b so snh trn mch tch hp l quan trng khi mt cch in hnh b bin i tc thi ly mu nhanh s bin i tn hiu u vo. Nu tt c b so snh khng ly mu u vo ti cng mt ch trn dng sng th li c th xy ra. Hn na, s tr do truyn lan ca tn hiu ti cc b so snh gy kh khn s thch ng nh kch c mng tng. y l mt l do m b bin i tc thi thng dng php nhn logic vi mch gi v ly mu, khi ly mu u vo mt cch l tng cung cp tn hiu khng thay i c ti tt c b so snh ti thi gian ca s ng b. S thay i ca cu trc tc thi c th c dng lm gim tn km ca phn gii cao hn. Cc k thut ny, gm c m ho tng t, s gp (folding), v ni suy c th gim bt V in dung u vo refv kch c mng b so snh mt cch ng Vin k.

ng h

E N C O D E R

D liu ra

M nhit k B so snh

M 1 of N

Hnh 5 : S khi ca b bin i A/D tc thi.

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3.2. Sai s ng trong ADC song song (Dynamic Errors in Parallele ADCs). Nu khng dng mch gi v ly mu th trong nhng phm vi no sai s ng c th gy tn hi ti cu trc A/D tc thi v bin thc ca n. Sai s ng c nh ngha y nh l kt qu khi tn hiu u vo c tn s cao c ng dng cho ADC. Sai s ng ph bin l do ADC c in dung u vo phi tuyn ln(voltage-dependent). in dungny c tnh phi tuyn khi n gm c phn ln tip gip bn dn. Khi in dung u vo ny c truyn t ngun tr khng xc nh, mo c th xy ra ti tn s cao. Cc loi sai s ng khc xy ra nu u vo v tn hiu ng h khng c phn phi mt cch tc thi ti tt c cc b so snh trong ADC. D trong ng dng n khi, s tch bit v vt l ca b so snh c th ln gy kh khn ny cho u vo tn s rt cao. i vi sng hnh sin 1 GHz ti s giao nhau 0, tc thay i cao 10 ps. Tn hiu thay i 3% ton b thang . s ho tn hiu ny mt cch chnh xc, tt c b so snh phi c iu khin bi cng mt im trn tn hiu khi ng h xut hin. Nu c s khng thch ng trong khong tr trong ng h hoc s phn b tn hiu ti b so snh ch trong 10 ps, s c s khc nhau 3% gi tr tn hiu nhn bit c bi b sa snh khc nhau. Kt qu t ti u ra b so snh, sau khi gii thch bi b m ho bm theo, cho kt qa sai s m u ra ln. C hai sai s ny c chiu hng xu nh phn gii b 0 bin i tng, khi in dung u vo v kch c mng b so snh c hai u ln ln. N c th hn ch phn gii c th 0 nhn c thc t trc 0 khi nng lng v s rng buc phc tp tham d vo. Mt cch in hnh cc mch ly mu v mch gi c dng vi ADC song song loi tr vn ny.
0 0

1 0

9
1 0

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Hnh 6: M nhit k t b so snh c bin i thnh m 1 of N dng cng logic. 3.3. Mch gi v ly mu. Cc mch gi v ly mu loi tr sai s ng t ADC song song bng cch m bo rng tn hiu u vo b so snh khng b thay i khi ng h b so snh xut hin. M hnh quan nim ly mu v gi iu khin ADC c cho trong hnh (7). Khi chuyn mch c ng, in p trn ton b t bm theo tn hiu u vo. Khi chuyn mch m, t in gi gi tr u vo lc . Gi tr ny c ng dng vo u vo ADC qua b khuch i, v sau khi thch ng gi tr n nh c th c ca b so snh. Duy nht sau l b so snh c ly thi gian(clocked), loi tr vn v s phn phi tn hiu da vo trn v tt c cc sai s ng khc lin quan vi b so snh. Thc ra, c s hn ch i vi ch tiu cht lng ng ca mch gi v cng vi mch ly mu. i vi phm vi m n c in dung u vo phi tuyn, cng mt mo c tn s cao cp trn s xut hin. D th no th mt cch in hnh hiu ng ny s b gim nhiu hn, khi mt cch in hnh in dng u vo ca mch gi v ly mu thp hn nhiu so vi b bin i song song. Bi ton ng ca mch gi v ly mu thng thy khc l mo khu (perture distortion). N da vo mo c a ti bi thi gian ct khng zero ca mch ly mu trong h thng. N c th a vo mo khi ly mu tn hiu tn s cao, khi im ly mu hin dng trn tn hiu c th l mt hm tc tn hiu ca s thay i (tc nhy dng in) v ADC hng. Vi nguyn nhn ny, phi quan tm nhiu ti vic thit k Mch gi v ly chuyn mch smu trong mch gi v ly mu. dng
X1 Am p X1 Am p

u vo

ng h gi v ly mu 10

E N C O D E R

D liu u ra

ng h b so snh

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Hnh 7: Mch gi v ly mu iu khin ADC song song.

D5 D1 D2

Vo D3 D4 D6

Ra

Hnh 8: Mch cu Diode dng lm chuyn mch ly mu. Tranzito MOS c th c dng trc tip lm cc chuyn mch ly mu, v cc s ci thin trong tc tranzito dn ti ch tiu cht lng gi v ly mu tt hn. Cu hnh khc ca b ly mu c ch tiu cht lng cao thng c dng l cu diode, cho trong hnh (8). Vi dng in chy trn hng cho, chuyn mch bt ln. Tn hiu u vo c ni ti t gi qua diode dn in D1 n D4. Diode D5 v D6 tt. tt chyun mch, dng in phi ngc li. By gi diode D5 v D6 dn in, v cc diode cn li b tt. Tn hiu u vo khng ph thuc vo t gi bi chui OFF ca cc diode D1 n D4 v diode phn dng ON D5 v D6. 11

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B ly mu dng cu diode thng c xy dng t diode Shottky m n tn dng ph ti khng lu tr. Chng c th b tt nhanh chng, to ra mo khu . Mch gi v ly mu c ch tiu cht lng rt cao c xy dng bng cch dng phng php ny. 3.4. ADC ghp xen (Interleaving ADCs) . Khng ti tc ly mu ca b bin i hin c ca A/D, tc ly mu cao hn thng c yu cu. N c bit ng trong ng dng xyl thi gian thc (real time) ni m rng bng tn c th bit c t l trc tip ti tc ly mu. nhn c tc ly mu cao hn, mng b bin i thng phi c xen ln nhau. V d, bn b bin i 1 GHz, iu khin bi mt tn hiu u vo n, c th hot ng vi ng h ca chng cch nhau ti thi gian 900. N to ra tc ly mu u vo tp hp 4 GHz, nng ln rng bng c th bit c t gi tr in hnh 250 MHz ti 1 GHz ( thc ra nhn c rng bng 1 GHz th mch ly mu trong ADC phi c rng bng 1 GHz). Nhng s xen ln thng a ra sai s do s khng thch ng trong c tnh ring ADC. Sai s tng ch v sai s b trong ADC n khng b xen ln c th sn ra mt cch tng i sai s v hi (innocuous errors) m khng quan trng i vi ng dng. Trong h thng xen ln, khc bit nhau trong sai s tng ch v dch chuyn ca ring ADC c th chuyn i ti thnh phn tn s gi mo ti b s con tc ly mu. N s c bit khng mong mun nu ph ca tn hiu c ch . Tht may, sai s tng ch v sai s b trong h thng ADC ghp xen c th c ly chun. S kh khn hn loi tr nh hng ca s khng thch ng ng trong ADC. Chng c hai ngun: S nh pha khng chnh xc ca ng h m chn vo h thng ADC, v rng bng khc nhau trong mch b ly mu trc ADC. nh hng ca sai s do pha ng h c minh ho trong hnh (9), cho bit nh hng ca mt ng h b bin i khng nh pha(mis-phased) trong mt h thng ADC ghp xen bn li (four-way). i vi tn hiu u vo 1 GHz, sai s do pha ng h 10 ps t kt qu sai s 3% trong gi tr ly mu c ly. y l kt qu trc tip ca tc nhy dng tn hiu c s ho. ng h khng nh pha trong h thng ADC ghp xen c th sn ra thnh phn tn s gi mo v thay i dng(in shape) hoc nh thi trong dng sng c xy li. Mch gi v 12

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ly mu hng hai (two-rank) ly mu u vo vi duy nht mt b ly mu cn thit c th loi tr vn ny. Th tc ly chun m iu chnh pha ng h cng c th gip gim nh hng ny. nh hng do s khng thch ng rng bng tng t vi nh hng do s khong thch ng nh thi. S ly chun gim nh hng ny l rt kh, d th no th s iu chnh yu cu ca p ng tn s mch tng t ch l hn iu chnh tr ca mt tn hiu s.
2 t 1 V Thi gian ly mu mong mun Thi gian ly mu hin ti 4

Hnh 9: nh hng sai s nh thi trong h thng ADC ghp xen .

4. B bin i tng t-s a bc(Multistept AnalogTo-Digital Convertors).

B bin i a bc thng c dng khi yu cu phn gii ca ng dng vt qa phn gii hin c trong b bin i song song. Mt ng dng in hnh cho b bin i a bc l trong b phn tch ph s ho trc tip ni m phn gii 12 bt c yu cu ti tc ly mu cao nht hin c. y b phn tch ph s ho trc tip c nh ngha nh l ci m dng bin i Fourier ca bn ghi u ra ADC tnh ton ph. Mt cch in hnh, chng cung cp lu lng php o cao hn b phn tch ph tng t vi xyl qut v cu trc trn. y a bc (multistep) gm c rt nhiu cc loi cu trc. 4.1 B bin i tng t-s hai bc. Mt v d rt n gin ca ADC a bc l b bin i hai bc vi phn gii 12 bt (hnh 10). Tn hiu u vo c c thu thp bi mch gi v ly mu v s ho bi b bin i song song vi phn gii 6 bt. Sau kt qu s c bin i b bin i s-tng t (DAC) thnh dng tng t v tr i t u vo. Cho kt qu phn cn li(residue) nh (s khc 13

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nhau gia u vo v mt ci gn nht trong nhng mc c lm trn ADC 64) c khuch i bng 64 v sau s ho bi ADC 6 bt song song khc. Hai kt qu 6 bt c cng vi trng s thch hp nhn m u ra 12 bt. T v d ny, thy r li im ca cu trc hai bc. Tn hiu c tch ra 12 bt, nhng duy nht 128 (2*64) b so snh c yu cu. Mt cch y b bin i song song phi c yu cu 4096 b so snh. B bin i hai bc cung cp nng lng thp hn, s phc tp v in dng u vo hn b bin i song song trong cng mt tc . Gi phi tr l s cng thm ca mch gi v ly mu ca ADC. Mch gi v ly mu cn c thu thp ly mu u vo v gi n khng thay i qua thao tc tun t ca hai b bin i song song v DAC. DAC phi tht chnh xc i vi phn gii u ra mong mun ca b bin i (12 bt nh trong v d trn). 4.2 B bin i tng t-s nhanh (Ripple-through Analog to Digital Converters). Cu trc hai bc to ra s gim quan trng s b so snh so vi cu trc song song. D th no, 128 b so snh vn c yu cu trong v d 12 bt hnh (10). Hn na s gim c th thc hin c c bng cch s dng nhiu tng hn na trong qu trnh bin i, vi vi bt trong mi tng v tng ng vi khuch i thp hn trong b khuch i phn cn li (residue amplifier). Mt b bin i ba tng tch ra bn bt trong mt tng s cn 48 b so snh. B bin i loi ny (vi hn hai tng ADC nhng ch vi duy nht mch gi v ly mu) thng c gi l b bin i nhanh. Mt bt trong mt cu trc nhanh tng cho trong hnh 11. Mi mt tng gm mt b so snh n, mt bt ADC, mt b tr, v mt b khuch i vi h s khuch i hai. Trong mi mt tng, mt bt c tch ra v mt phn cn li i ti tng tip theo. B so snh ca mi tng c ly thi gian ca s hot ng xung ti (down the converter) b bin i. Mt bt trong mt cu trc tng gim ti thiu s m (count) ca b so snh, nhng n yu cu thm na b khuch i v tng DAC hn b bin i hai bc. Mt khc, y l cc tng rt n gin, v ton b s m (count) thnh phn thng thng thp hn trong b bin i nhanh so vi b bin i hai bc. Mt khc, tc ly mu ca mt bt trong b bin i tng tr thnh thp hn b bin i hai bc. Phn ln y l kt qu ca mt lng ln cc thao tc tun t c yu cu. 14

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12b d liu

Tng

ADC 6
S/H Vo DAC X64

ADC 6 bt

bt

12 bt accurate

Hnh 10 : S khi ca ADC hai bc 12 bt.

V S/H o

Tng 1

Tng 2
D liu ra

Tng 3

Tng 12
Phn cn li tng t vo

Phn cn li t ng t vo

ADC 1 bt B so snh

ADC

X2

Ti tng tip theo

Hnh 11: S khi ca b bin i nhanh 12 bt, mt bt trong mt tng. 4.3 B bin i tng t- s u vo ra song song (Pinelined Analog-to-Digital Converters). B bin i u vo ra song song tng tc kt hp vi b bin i a bc khc ng thi thay v thao tc tun t ca b so snh, DAC, v b khuch i trong mch in. C th nhn c bng cch t xen vo mch gi v ly mu gia cc tng. Hnh 12 l mt s khi cho mt bt trong mt b bin i tng. N tng t vi cu trc ca hnh 11, vi s to thm mch gi v ly mu. Mi mt mch gi v ly mu gi phn cn li t tng trc. Ti mi chu k ng h, mt ly mu mi ca u 15

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vo c thc hin, v phn cn li c khuch i tin ti mt tng xungdy truyn (pipeline).

V o

Tng 1

Tng 2
D liu ra

Tng 3

Tng 12
Phn cn li tng t vo

Phn cn li t ng t vo

DAC

ADC 1 bt

DAC

X2

Ti tng tip theo

Hnh 12 : s khi cho mt bt trong mt b bin i tng.

5. B bin i m(Conting Converter).

Mt trong nhng phng php n gin nht to ra in p so snh l dng b bin i s-tng t. Mt DAC n bit c th c dng to ra bt k mt trong nhng u ra ri rc 2n bng cch dng t s thch hp u vo. Cch trc tip xc nh in p vo khng bit trc(unknown) vx l phi so snh n vi tng u ra ca DAC mt cch tun t. S kt ni u vo s ca DAC ti mt b m nh phn n bit cho php s so snh vi u vo khng bit trc mt cch t t, c cho hnh (13). B bin i A/D bt u hot ng khi xung lm cho flipflop v b m t ti im zero. Mi xung ng h lin tip lm tng b m, u ra DAC ging nh cu thng trong thi gian bin i. Khi u ra ca ADC vt qu u vo khng bit trc, u ra ca b so snh thay i trng thi, kch flip-flop, v ngn khng cho cc xung ng h thm na ti b m. S thay i trng thi ca u ra b so snh ch ra rng qu trnh bin i kt thc. Ti thi im , ni dng ca b m nh phn phn nh gi tr c bin i ca tn hiu vo. Phi ch ti vi c im ca b bin i. Th nht, di ca chu trnh bin i thay i v t l vi in p u vo khng bit trc vx. Thi gian bin i max TT tn ti cho tn

16

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hiu vo ton b thang o (full-scale) v tng ng vi chu k ng h 2n hoc:

TT 2n = 2 n TC fc

(7 )

Trong fc=1/Tc l tn s ng h. Th hai, gi tr nh phn trong b m i din cho in p nh nht ca DAC m n ln hn u vo khng bit trc, khng cn thit gi tr ny phi l u ra ca DAC m gn nht vi u vo khng bit trc, yu cu t trc. Cng nh vy, v d trong hnh 13(b) cho trng hp u vo khng thay i trong thi gian chu k ca s bin i. Nu u vo thay i, u ra nh phn s l s i din chnh xc ca gi tr tn hiu u vo ti hng s m b so snh khng thay i trng thi. u im ca b bin i ADC m l n yu cu s lng phn cng ti thiu v khng qu t vn hnh. Nhc im ln l lin quan ti tc bin i thp i vi tc ca b bin i D/A cho trc. Mt b bin i n bit yu cu chu k ng h 2n cho s bin i di nht ca n.
+ vx

+
-

DAC n bit
vDAC

Flip - flop
Bin i kt thc

M ra ADC

B m n bit

(a)
v vDAC

Cloc k
v

Res et

vDAC t

T Bt u bin i

2T

3T

4T

5T

Kt thc bin i

6T

7T

t 8T

17
t

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(b) Hnh 13: (a) S khi ca b bin i m. (b) S khi nh thi(timing).

6. B bin i ADC xp x lin tip(Successive Approximation ADC).

Khc vi loi bc thang, loi ny ch bin i v so snh n nhp li vo ADC. Do vy, thi gian bin i l c nh khng ph thuc vo ln ca tn hiu cn bin i. S khi m t cu trc ADC xp x lin tip c trnh by trn hinh (14a). Chu trnh bin i bt u vi xung Start qua b iu khin logic (logic programmer) t hai thanh ghi lu tr (Shift register v store register) c gi tr ti na thang(100..00) nhp mi. Tc l n t cho bit nhiu ngha nht MSB ca cc thanh ghi bng 1, cc bit cn li bng 0, lm cho li ra ca DAC VO=1/2FS. Tu thuc vo trng thi ca b so snh COMP, tc l tu thuc vo tng quan gia hai th VO v VI. B iu khin logic s iu khin nh sau: nu VO<VI, trong nhp th hai, gi tr 1 c gi li v nu VO>VI gi tr c xo v 0, ng thi thanh ghi dch s dch s 1 ti bit tip theo bit MSB. M s c DAC bin i tng ng thnh th VO v li c so snh trong nhp th hai ny. Qu trnh c tip din vi tng bit n-bit digital output nh vy cho ti bit t ngha nht LSB c a ln 1. Sau n xung nhp, mt xung EOC(end of convert) c pht ra bo rng mt qu trnh bin i xong. Lc ny m s li ra thanh ghi lu n-bit tr (hay li vo ca b DAC) chnh l tng ng vi th cn bin DAC i.
Vo B so snh

VI Vin

Logic Programmer

Storage Register

n bit

18 Clock

n-bit Shift Register

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(a) Hnh (14b) cho dy m i vi DAC 3 bit v dy sau ay cho b bin i xp x lin tip trong hnh. Ti thi im bt u ca s bin i, u vo DAC c t ti trng thi 100. Ti thi im kt thc chu k ng h th nht, thy rng in p DAC nh hn vx, do m DAC tin ti trng thi 110. Ti thi im kt thc chu k ng h th hai, in p DAC vn rt nh, v m DAC tin ti 111. Sau chu k ng h th ba, in p DAC rt ln, do m DAC b gim nhn gi tr c bin i cui cng l 110.

100 100 101 100 011 010 001

T 2T

111 110 101 100 011 010 001 000

t

M cui cng

(b)

3T

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Hinh 14: (a)S khi ca ADC xp x lin tip. (b) Cc chui m ca ADC xp x lin tip 3 bt. Tc bin i nhanh c th thc hin c i vi ADC xp x lin tip. K thut bin i ny rt ph bin v c dng trong rt nhiu trong b bin i 8 ti 16 bit. Nhn t c bn hn ch tc ADC ny l thi gian c yu cu cho u ra b bin i D/A n nh gia phn s mt LSB ca VFS v thi gian c yu cu cho b so snh tng ng vi tn hiu vo m c th khc nhau bi mt lng rt nh....

7. ADC kiu bc thang (kiu servo).

Trn hnh 15 gii thiu s khi ca b ADC kiu bc thang. Nguyn tc ca n nh sau: Chu trnh bin i bt u khi xung start xo b m nh phn n bit(n bit counter). V rng VO<VI nn li ra b so snh mc 1, cng AND m cho cc xung Clock vo b m. S m tng dn cho ti khi VO bt u vt qu VI, li ra ca COMP s tr v 0 v kho cng AND li. M s li ra b m lc ny tng ng vi ln th Analog cn bin i. Nu o dng sng VO trong mt chu k bin i, ta s thy mt sng hnh bc thang. ADC loi ny c kt cu n gin nhng c nhc im l thi gian bin i ph thuc vo ln th cn bin i.
u ra n bit s

DAC
VO VR B so snh

+ ng h

n-bit counter

start(Rese t)

Hnh 15: S khi b bin i ADC kiu bc thang. 20

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8. ADC bm st (tracking).
Nu gi tr VI ch bin i quanh mt ga tr no th loi ADC ny t ra tin li hn. Nguyn tc ca n l dng b m ln xung(up - down counter). Mch c thit k sao cho nu VO<VI (th li ra ca b so snh bng 1), b m s trng thi m ln, nu VO>VI (th li ra ca b so snh bng 0) th b m s trng thi m xung. u ra n bit li ra ca DAC Nh vy th s lun c xu hng bm st th vo cn bin i. n bit DAC
VO VR B so snh
n-bit Up/down counter

+ ng h

U/D

Vin

Hnh 16: S khi ADC bm st.

9. Sai s tnh v k thut kim tra.

9.1. Sai s b, sai s tng ch v sai s tuyn tnh. Sai s b v tng ch trong ADC ging nh sai s b v tng ch trong b khuch i. Nu mt ADC c sai s b th s c mt dch chuyn h thng trong gi tr ca in p ngng T(k) t gi tr bnh thng. C kh nng xc nh c sai s b t php o in p ngng n ti im gia ca khong chuyn i. Nhng nu php o ny c sai s tng ch v sai s phi tuyn, th thng xc nh sai s b. Mt phng php o rt hay dng l phng php bnh phng nh nht t gi tr ngng T(k) ti gi tr T(k) l tng. gi tr b cn thit c c s thch hp tt nht ca gi tr thc t vi ga tr l tng l gi tr b ca s chuyn i. Cng nh vy, sai s tng ch l mt khong ca in p ngng cao hn hoc thp hn s vi gi tr tuyt i. Mt cch tng ng, sai s tng ch tn ti nu rng thu ca m trung bnh 21

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cao hn hoc thp hn so vi gi tr Q bnh thng. Thm vo , sai s tng ch c th t c bng cch to ra ng thch hp nht (trn th c tuyn) ca gi tr T(k) vi gi tr l tng ca n. Sai s tuyn tnh nh ngha mt cch truyn thng bng phi tuyn tch phn (INL Integral NonLinearity) v ph tuyn vi phn (DNL Differential NonLinearity). phi tuyn tch phn l s sai khc ca mc ngng T(k) so vi gi tr bnh thng ca n sau khi loi b cc sai s b v tng ch. phi tuyn vi phn i din cho s khc nhau ca rng nh phn W(k) so vi gi tr Q bnh thng, tt nhin l sau khi sa sai s tng ch. Sai s INL v DNL thng c biu din bng n v bt trng s nh nht (LSBs-Least Significant Bits), vi LSB=Q. Sai s phi tuyn tch phn biu din theo LSBs c gi tr:
INL ( k ) = T ( k ) ( k 1)Q Q

(8)

Vi k=2 ti 2n-1 Trong cng thc trn b qua sai s b v sai s tng ch v T(1)=0. Tng t, sai s phi tuyn vi phn theo LSB l:
DNL = W (k ) Q Q

(9)

Vi k=1 ti 2n-2 R rng l INL v DNL c quan h vi nhau. Trong thc t, DNL l vi phn th nht ca INL, ngha l: DNL(k)-INL(k+1)-INL(k) (10) Hai thng s cht lng ca c tuyn ADC lin quan n INL v ANL l m n (missing code) v tnh n iu (monotonicity). Nu mt ADC c mt s m khng bao gi xut hin ti u ra, th b chuyn i c gi l m n. iu ny tng ng vi rng nh phn W(k)=0 ti m v km theo mt sai s DNL kh ln. Tnh n iu l khi u ra ca ADC tng hoc gim tuyn tnh theo tn hiu u vo. Khi kim tra tnh n iu ca ADC, cc nh hng ca nhiu phi c loi b. 9.2. K thut o. C nhiu k thut c s dng o sai s b, tng ch v sai s tuyn tnh. Mc ch chung ca chng l nh v chnh xc gi tr T(k). Khi iu ny c thc hin th cc gi tr sai s 22

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b, sai s tng ch v sai s tuyn tnh c th nhanh chng tnh c. Co hai k thut thng c dng l s dng b bin i s tng t, hay l s dng thit b gi l vng bm (Tracking loop) . Trong phng php th nht b bin i DAC cn c chnh xc v phn gii coa hn ng k so vi ca ADC b o. thc hin k thut ny u ra ca ADC s c a ti u vo ca ADCv nghi nhn cn thit m u vo ADC nh v gi tr in p ngng T(k). R rng l phng php ny cn da trn kt qu thng k cc quyt nh ti u vo ca u ra ADC tm ra iu kin chim hn 50% s nht tr. iu ny c th lm c bng cch tt nht l lu tr cc s liu ca ADC trong b nh v phn tch chng bng my tnh. Mt k thut khc l s dng vng bm nh v T(k). B iu khin cn c mt vng tm ra gi tr T(k) bng cch gi m k ti b so snh gi tr s, b ny s so snh k vi u ra ADC. Nu u ra ADC thp hn, th u ra ca b tch phn s ko bin tn hiu ln, iu ny lm tng gi tr u vo ADC. Khi u ra ca ADC cao hn th qu trnh s lm ngc li, b tch phn s ko xung.

+V(C K) -V(CR K) <

Vn mt s
ADC N

B iu khin B so snh i l ng s

M iu khin K

di s kim tra C ti u M ra

Hnh 17: Vng bm c dng cho o ADC tuyn tnh. Cn phi c mt s bin php phng nga om bo s o dc chnh xc. Trong phng php 1, phn gii v chnh xc ca vn mt phi cao hn so vi ADC, iu ny d thc hin. Hng s thi gian tnh ch phn cn chn nh sao cho sn nh - nh d kin (thi gian chuyn i ca ADC) nh so vi Q. M thut vng bm lm vic tt vi b chuyn i u, vi b chuyn i ny, b tch phn c th b nghn ti mt ngng 23

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no y khi mt ngng khc ang b yu cu. iu ny thng xy ra nh l mt sai s ln (ln hn 1 LSB), cho n khi vng bt thng (khng u) ny qua i. Trong cc ng dng phn tch ph, mo ca b chuyn i l chia kho la chn. Nu phi la chn, mt b chuyn i vi sai s DNL thp s tt hn b chuyn i vi sai s INL nh do c mo thp hn nhiu vi tn hiu vo nh. Trong c tuyn, mt bc trong sai s INL s to ra mo ln theo bin tn hiu. Mt khc mt sai s INL hnh cung nhn (smooth bow - shaped) s to ra mo vi tn hiu vo ln nht, nhng bin ca n s gim rt nhanh theo tn hiu nu bin tn hiu vo gim. iu ny c th khc phc bng mt b suy gim u vo ca my phn tch ph.

10. Sai s ADC ng v cc k thut kim tra.

Sai s ADC ng l sai s xy ra khi a tn hiu cao tn vo u vo tng t ca b chuyn i. Cc sai s ng thng thy l mo, sai pha v nhng bt thng v p ng bc (step response anomalies). Cc sai s ny v cc k thut kim tra tng ng c trnh by trong phn ny. Cc thnh phn tp, nhiu v cc sai s n nh c th xy ra i vi c tn hiu hiu vo tnh v ng. 10.1. Cc loi sai s. a. Mo v cc thnh phn tp. Mo ADC ( n to ra cc hi ca tn hiu vo) l thnh phn quan trng i vi cc my phn tch ph, thng tm thy mo tn hiu bng cch kim tra. Cc thnh phn tp, c nh ngha nh l thnh phn ph d thy, m n khng phi l hi ca tn hiu vo, cng quan trng i vi ng dng my phn tch ph. Mo c th to ra do phi tuyn tch phn v vi tch phn c tuyn vo /ra ca b chuyn i. Mo ny xy ra vi tn hiu vo mt chiu v xoay chiu. Mt loi mo khc, mo ng xy ra i vi tn hiu vo cao tn. Mo ny l do s gii hn ca vic mu v gi trc b ADC, hoc trong b ADC nu khng s dng ly mu v gi. Mt ngun to ra mo l t in c in dung bin i theo in p trong mch ch ngca b chuen i. Ti tn s cao, t ny to ra meo khi c iu khin bi mt ngun c tr khng ra hu hn.

24

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Cc thnh phn tp l cc ng ph ch khng phi l hi ca tn s tn hiu vo. N xut hin nh l hi ca tn s tn hiu ng h, hoc l do s giao thoa ca cc ngun gn nhau trong h thng. Mo ADC c o bng n v dB m theo bin ca tn hiu vo. Tp bng o n v dB m theo khong ln nht ca ADC. b. Nhiu. Nhiu l nhng th cn li trong ph khi loi b phn c bn v tt c cc hi ca tn hiu vo. N bao gm cc i lng ngu nhin v c cc thnh phn tp. Nhiu c biu din bi t s tn hiu/nhiu(S/N): SNR c th c tnh ton nh thut ton bin i Fourier nhanh FFT:
SNR = GiatriRMSc uatinhieu GiatriRMSn hieu

(11)

Gi tr cn bc hai tn hiu c tnh ton trc, sau tn hiu v tt c cc hi ca n c loi b ra khi s kiu ra ca cc FFT. Gi tr cn bc hai ca tng cc thnh phn cn li c tnh ton, t s tnh c SNR. Mt thng s ca ADC l t s tn hiu trn tng nhiu v mo SNDR (Signal to Noice Distortion Ratio):
SDNR = GiatriRMSt inhieu GiatriRMS ( nhieu + meo )

(12)

Gi tr ny c th c tnh d dng t kt qu ca php bin i FFT trong mt php kim tra sng hnh sin. T s l gi tr tn hiu, mu s l tng ca cc phn khc trong ph. SNDR l hm ca c bin v tn s ca tn hiu vo, do cch biu din tt nht l mt h ca cc ng c tuyn. c. Cc bt hiu lc. Gn vi SNDR l mt thng s cc bt hiu lc. Cng ging nh SNDR, cc bt hiu lc biu din mo v nhiu ca b chuyn i trong mt s n duy nht. y l gii php gm mt ADC l tng (khng c sai s) v mt ngun nhiu lng t tng ng vi mi sai s ca ADC phi c kim tra. Bt hiu lc E c tnh ton nh sau:
E = n log( can 2) SaisoRMSth ucte SaisoRMSly tuong

(13)

Trong : n l phn gii ca ADC. 25

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Cn bc hai ca sai s tht l phn cn li sau khi tr i sng hnh sin. Cn bc hai ca sai s l tng l nhiu lng t. d.Rung pha (Apecture Jitter). SNR c th l hm ca tn hiu vo. iu ny c bit ng nu c bin i thi gian trong b iu khin ng h hoc c mch ly mu trong ADC. Vn ny thng lin quan n rung pha. Rung pha l iu khng logic i vi tn hiu vo tn s thp, nhng n c th chuyn thnh nhiu c bin ln, khi u vo bin i nhanh. y l iu gy kh khn nht cho cc ADC lm vic ti cc tn s rt cao. trnh vic dng cc b rung pha ng h t bn ngoi ADC, cc ngun gy nhiu tn s thp cn c s dng i vi tn hiu hnh sin. e. p ng bc thang (step response). Mc d SNR, SNDR, bit hiu lc.. l cc s liu rt c ch ca c tuyn ADC, nhng chng khng cung cp y thng tin on c p ng bc thang ca mt ADC , y chnh l hm ca p ng pha v tn s ca b chuyn i tn s. S khng phng ca c tuyn ch tn thp( i khi do nh hng ca nhit ) c th dn ti gii quyt chm tn hiu u vo bc. S nh hng ny ko di vi micro giy hoc thm ch vi mili giy. Ni chung, p ng bc thang c chu nhiu trong ng dng xyl s ca ADC. phn bit p ng bc thang, phng php o c trc tip n gin hn l suy lun ra t nhiu php o sng hnh sin ti nhiu tn s khc nhau. Bin php n gin nht l dng b to xung iu khin b chuyn i. f. sai s cn bng (Metastability Errors). Sai s ny xy ra trong ADC khi b so snh c gi trng thi cn bng. Trng thi cn bng l trng thi u ra ca b so snh khng mc cao cng khng mc thp m gia. iu ny xay ra khi tn hiu vo b so snh rt gn vi ngng, b so snh c thi gian to li mt trng thi logic khc. Mc d sai s cn bng c trnh by trong phn sai s ng nhng thc cht n cn xay ra khi tn hiu vo l mt chiu. Trng thi cn bng c th to ra sai s ln ti u ra ca ADC, mc d chng t khi xay ra. Sai s ln ny l kt qu ca 26

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mch logic b iu khin bi b so snh lp li mc xu mt cch khc nhau. Mch logic ny thng l mt phn ca b m ho, i khi sai s ti na mc ln nht. Trng thi cn bng c v xy ra nhiu hn i vi b chuyn i lm vic ti tn s rt cao, ni m c t thi gian cho s ti to trng thi. 10.2. Cc phng php kim tra: a. Kim tra rung pha Phng php dung ngun n (trong hnh) c th dng kim tra rung pha. S dng mt ngun gim thiu c nh hng ca rung pha trong ngun , do tn hiu ng h v tn hiu vol t mt ngun chung. Mt nh hng khc ca vic s dng ngun n l vic ADC ly mu trong chu k ca tn hiu vo. S liu ti u ra ca ADC s c lu tr v c x l nh b x l trung tm CPU. Lc u b tr c iu chnh sao cho ADC ly mu ti nh ca sng hnh sin ( ch ny c tc bng 0) , vic o nhiu c thc hin bng phng php FFT. Sau , b tr c iu chnh sao cho ADC ly mu ti ga tr 0 cang snh sin (tc xoay ln nht). Bng cch ny, rung pha ca ADC c chuyn thnh in p ca nhiu bng tc xoay chiu ca tn hiu vo. Nu nhiu ca ln kim tra th hai ln hn th c mt s rubg pha ng k trong h thng.

B
B tng hp tn s(out) B tch cng sut

IN fin ADC CK

nh m CPU

fin

B gy tr

Hnh 18: S khi phng pht o kim tra rung pha b.Kim tra tn s phch. Trong cc ln trc, nhiu thng s ca ADC c nh ngha k c t s tn hiu trrn nhiu, bt hiu dng v mo hi tng. y l cc thng s c gi tr ca c tuyn ADC nhng n khng ch ra bn cht vn , ch ra nguyn nhn ca vn 27

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v khng cho bit lm cch no c nh chng. Vic kin tra tn s phch i khi gip ta hiu r c vn . Vic thit lp kim tra l ng nht vi vic kim tra sng hnh sin. Vic kim tra tn s phch c thc hin bng cch t tn s vo ti gi tr hi cao hn tn s ng h fs, ngha l cao hn mt gi tr tn s df. Ngha l ADC s ly mt mu trong mt khong tn hiu vo. Do tn s hi ln hn tn s ng h, nn pha ca mu s sm trc mt cht. Kt qu l m u ra ca ADC s to li mt sng hnh sin tn s thp m c s xut hin ca tn s df. Sng hnh sin vi s khng hon ho ca n c th biu din gip phn tch hot ng ca ADC. Mt cch khc xem xt qu trnh x l l tn hiu vo c ly mu hiu qu ti tn s cao, tng ng vi fs/df.
B tng hp tn s, to ra tn hiu vo v ng h B to tn hiu vo IN

B
B lc

IN fin ADC CK

nh m CPU

B to tn hiu ng h ra CK

fs

Hnh 19: Phng php kim tra tn s phch. Vi gi tr df thp th t s s rt ln. Kt qu l ADC s pht hin ra cc mu ca sng hnh sin tn s cao, i khi sng ny b ly mu qua mc rt nng, vi nhiu mu trong mi m. Vi cch ny c th pht hin ra c nhiu khong tt ca ADC , nhng th chi tit ny khng thy c khi hot ng bnh thng vi m 0 trn mt khong thi gian ca tn hiu vo cao tn. Nu tn s tn hiu vo khng th to ra c ti tn s ly mu (cn phi t tc ly mu ti gi tr cao nht) th tn s tn hiu vo c th t cc gi tr fs/4+df v nguyn tc tn s phch vn c th p dng c. Trong trng hp ny, ch c mu th t c th hin. iu ny mt ln na li to dng li sng hnh sin n b ly mu qu mc. Cng nh vy, nu to ra c tn hiu vo cao gp nhiu ln gi tr fs, sau l gi tr df, th k thut kim tra tn s phch vn c hiu lc.

11. Xy dng h ghp ni ADC, DAC vi my tnh.

Vic thit k cc mch DAC, ADC s n gin i nhiu v mch in t nu ta s dng k thut ghp ni my vi tnh, v 28

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lc phn mm vi cc thanh ghi trong my tnh s lm nhim v thay th cho cc thanh ghi, b m v b iu khin phc tp. Trong trng hp , ta ch cn lp mt ADC, DAC vi phn cng ti thiu. Hnh 20 di l mt s in hnh ca mt DAC ghp ni vi my tnh. y cc thanh ghi, b iu khin logic v b m ngoi khng cn cn thit na. Chnh cc thanh ghi m li ra (IN/OUT buffer register) ca cc cng vo ra s lm thay nhim v chng. Cng vy, cc thanh ghi vo ca my tnh cng s lm nhim v kim tra trng thi li ra ca b so snh COMP trn c s my tnh s quyt nh t cc s thch hp cho cc thanh ghi trong cc nhp so snh... V0
Vr Vin

n-bit DAC
+ B so snh

My vi tnh

Hnh 20. Ta bit rng, b vi x l (CPU) ca my tnh lin lc vi cc thit b bn ngoi thng qua mt s a ch gi l cc cng vo ra (IN/OUT port). Trong mch ny, chng ta s s dng cng my in lin lc gia my tnh v phn cng ti thiu. Cng in song song LPT1 c mt a ch thanh ghi m s liu 8 bit l $378, mt thanh ghi c trng thi l $379, mt thanh ghi iu khin l $37A. Vic a s liu ra hoc c s liu vo c thc hin d dng bng ngn ng Pascal nh sau: c gi tr ca cng vo bin x x:=PORT[ a ch cng]; Vit cng PORT[a ch cng]:=gi tr; Vic c vo hoc vit ra gi tr tu ca mt vi bit trn cc thanh ghi m khng nh hng ti gi tr ca cc bit cn li (thuc phm vi khi nim gi l x l bit : manupulation of bit) c th thc hin nh cc ton t logic AND, OR, SHL, SHR vi lu rng trong Pascal, vic thc hin AND hoc OR gia hai s nh phn c thc hin vi tng bit mt tng ng. Do , ta t bit th n ln mt bng cc OR gi tr ca thanh ghi vi 2n, a bit th n xung 0 bng cch AND gi tr ca 29

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thanh ghi vi 255-2n. Vic kim tra gi tr ca thanh ghi th n cng c thc hin bng php AND hoc OR. Th d: x:=PORT[$378] OR 32; { a bit 5 ln 1} x:=PORT[$378] AND (255-32) {a bit 5 xung 0} if (PORT[$379] AND 32=32) then writeln(bit 5 bang 1); if (PORT[$379] AND 32=0) then writeln(bit 5 bang 0); V mt vt l, cng LPT chun c u ra chun 25 chn sau my tnh vi s b tr cc chn nh sau: Chn1: STROBE Chn2 n 9: 8 bit s liu t D0-D7 Chn 10: -ACK Chn 11: -BUSY Chn 12: -PE Chn 13: -SLCT Chn 14: -AUTOFDX Chn 15: -ERROR Chn 16: -INIT Chn 17: -SLCTIN Chn 18 n 25: t GND Thanh ghi $379 l thanh ghi c trng thi vo, vi cc bit nh sau: D7 -BUSY D6 -ACK D5 -PE D4 -SLCT D3 ERROR D2 D1 D0 -

Trong thc nghim, li ra ca b so snh C c a vo chn 10 ca b cm 25 chn. Do , theo bng ta thy vic kim tr trng thi ca b so snh s c thc hin bit D6 (ACK) ca thanh ghi nay. Thanh ghi $37A la thanh ghi iu khin li ra, y ta khng dng n nhng vn lit k ra tham kho khi ghp ni my tnh vi my pht tn hiu iu khin s: D7 D6 D5 D4 IRQ D3 SLCTI 30 D2 D1 D0 STROB INIT AUTOFXD

Tnh ton mch in t N

Cao hc 2001 E

*****

MC LC
1. Gii thiu...................................................................1 2. B bin i tng t - s tch phn............................2 31

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2.1. Cu trc hai sn dc .........................................2 2.2. Cu trc a sn dc...........................................5 3. B bin i tng t s song song..........................6 3.1. B bin i tc thi............................................6 3.2. Sai s ng trong ADC song song.......................7 3.3. Mch gi v ly mu............................................9 3.4. ADC ghp xen......................................................10 4. B bin i tng t s a bc................................12 4.1. B bin i tng t s hai bc.........................12 4.2. B bin i tng t s nhanh..........................12 4.3. B bin i tng t s u vo ra song song 13 5. B bin i m......................................................14 6. B bin i ADC xp x lin tip..............................15 7. B bin i ADC kiu bc thang...............................17 8. B bin i ADC bm st...........................................18 9. Sai s tnh v cc k thut kim tra..........................19 9.1. Sai s b, sai s tng ch v sai s tuyn tnh.....19 9.2. K thut o.........................................................20 10. Sai s ng v cc k thut kim tra.......................21 10.1.Cc loi sai s......................................................21 a. Mo v thnh phn tp.......................................21 b. Nhiu..................................................................22 c. Cc bt hiu lc...................................................22 d. Rung pha.............................................................22 e. p ng bc thang...............................................23 f. Sai s cn bng...................................................23 10.2. Cc phng php kim tra...................................23 a. Kim tra rung pha...............................................23 b. Kim tra tn s phch.........................................23 11. Xy dng h ghp ni ADC, DAC vi my vi tnh.....25

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