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Digital System Design Lab Manual

This document is a laboratory manual for the Digital System Design Using Verilog course under the Department of Electronics Engineering for the B. Tech program at an Autonomous Scientific Society in India. It includes a certification section for students who complete the course satisfactorily during the academic year 2024-2025. The manual is signed by the staff in-charge and the B. Tech coordinator, confirming the attainment of practical outcomes by the students.

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70 views2 pages

Digital System Design Lab Manual

This document is a laboratory manual for the Digital System Design Using Verilog course under the Department of Electronics Engineering for the B. Tech program at an Autonomous Scientific Society in India. It includes a certification section for students who complete the course satisfactorily during the academic year 2024-2025. The manual is signed by the staff in-charge and the B. Tech coordinator, confirming the attainment of practical outcomes by the students.

Uploaded by

Niss a
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

An Autonomous Scientific Society under Ministry of Electronics & Information

Technology, Govt. of India Aurangabad-431004,


Maharashtra State, India.

DEPARTMENT OF ELECTRONICS ENGINEERING

B. TECH

ELECTRONICS SYSTEM ENGINEERING

LABORATORY MANUAL

Digital System Design Using Verilog

Name:
Class: Branch:

University Exam /
Seat No./ Roll No.

Academic year
2024-2025
An Autonomous Scientific Society under Ministry of Electronics & Information
Technology, Govt. of India Aurangabad-431004,
Maharashtra State, India.
DEPARTMENT OF ELECTRONICS ENGINEERING
B. TECH in Electronics System Engineering

CERTIFICATE

This is to certify that Mr. / Ms.


Roll No. of _____________________________Semester of B. Tech
in ___________of Institute_______________________________________________(Code_ _ )
has attained pre-defined practical outcomes (PROs) satisfactorily course Digital System Design
Using Verilog for the academic year 20 __ to 20__ as prescribed in the curriculum.

Place: -
Date: -

Staff In-charge B. Tech Coordinator


Mr. Ravi Ranjan Kumar Dr. Anirban J Hati
(Sr. Technical Assistant) (Scientist ‘C’)

Executive Director
Dr. Jayaraj U. Kidav

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