Total No. of Questions : 8] SEAT No.
8
23
PA-1240 [Total No. of Pages : 2
ic-
[5925]-263
tat
2s
S.E. (Computer)
7:2
MICROPROCESSOR
02 91
3:3
(2019 Pattern) (Semester - IV) (210254)
0
31
Time : 2½ Hours]
0/0 13 [Max. Marks : 70
0
1/2
Instructions to the candidates:
.23 GP
1) Solve Q.1 or Q.2, Q.3 or Q.4, Q.5 or Q.6, Q.7 or Q.8.
2) Neat diagrams should be drawn wherever necessary.
E
81
8
3) Use of Non-programmable Calculator is allowed.
C
23
4) Assume suitable data if necessary.
ic-
16
tat
Pg 133 & Pg 2 Notes
8.2
2s
Q1) a) Explain the Segment Translation Process with a neat diagram of 80386.[6]
.24
7:2
91
b) Differentiate and explain GDTR, LDTR, and IDTR. [6]
49
3:3
Pg 3 Notes
30
c) Demonstrate General Selector Format in brief. [6]
31
Pg 1 Notes
01
02
OR Pg 5 Notes also in Pg136Book &
Pg6Decode
1/2
GP
Q2) a) Demonstrate General Descriptor Format available in various descriptor
0/0
tables. [6]
CE
81
8
23
b) With the necessary diagram, explain the page translation process in 80386.[6]
.23
ic-
Ph 1 Notes
16
c) Explain the use of following instructions in detail: [6]
tat
8.2
2s
i) LGDT
.24
7:2
91
ii) SIDT
49
3:3
30
31
iii) LLDT
01
02
1/2
GP
Q3) a) What is call gate? Explain how it is used in calling functions with higher
0/0
privilege levels. [6]
CE
81
b) Explore five aspects of protection applied in segmentation. [6]
.23
16
c) Explore the need for a protection mechanism in 80386. [5]
8.2
OR
.24
P.T.O.
49
[5925]-263 1
Pg 6 Notes
Q4) a) Explain the following terminologies. [6]
8
23
i) CPL
ic-
ii) DPL
tat
2s
iii) RPL
7:2
b) Explain different levels of protection. Describe the rules of protection
02 91
3:3
check? [6]
0
31
c) 0/0 13
Elaborate on the concept of combining segment protection and page
level protection in 80386. [5]
0
1/2
.23 GP
Q5) a) Explore memory management in the Virtual 8086 Mode. [6]
E
81
8
C
23
b) Explain the TSS descriptor of 80386 with a neat diagram. [6]
ic-
c) Explore the role of Task Register in multitasking and the instructions
16
tat
used to modify and read Task Register. [6]
8.2
2s
.24
OR
7:2
91
49
3:3
Q6) a) Draw and explain the Task State Segment of 80386. [6]
30
31
b) With the necessary diagram, explain entering and leaving the virtual mode
01
02
of 80386. [6]
1/2
GP
c) Difference between Real Mode and Virtual 8086 Mode. [6]
0/0
CE
81
8
Q7) a) Explain the following exception conditions with an example: Faults, Traps,
23
.23
and Aborts. [6]
ic-
16
tat
b) With the help of the necessary diagram, explain the structure of IDT in
8.2
2s
80386. [6]
.24
7:2
91
c) List and elaborate on different applications of microcontrollers. [5]
49
3:3
30
OR
31
01
02
Q8) a) Differentiate and explain the Interrupt gate and Trap gate descriptor.[6]
1/2
GP
b) How interrupts are handled in protection mode. Explain with the help of
0/0
a neat diagram. [6]
CE
81
c) Differentiate between Microprocessor and Microcontroller. [5]
.23
16
8.2
.24
49
[5925]-263 2
