You are on page 1of 2

Total No. of Questions : 8] SEAT No.

8
23
P650 [Total No. of Pages : 2

ic-
tat
[5869]-279

4s
S.E. (Computer)

0:5
02 91
MICROPROCESSOR

8:3
0
(2019 Pattern) (Semester - IV) (210254)

20
Time : 2½ Hours] 0/0 13 [Max. Marks : 70
Instructions to the candidates:
0
6/2
.23 GP

1) Answer Q.1 or Q.2, Q.3 or Q.4, Q.5 or Q.6, Q.7 or Q.8.


2) Neat diagrams must be drawn whenever necessary.
E

3) Figures to the right side indicate full marks.


83

8
C

23
4) Assume suitable data if necessary.

ic-
16

tat
Q1) a) With the help of a neat diagram, explain the Page Translation Process
8.2

4s
in 80386. [6]
.24

0:5
91
b) Draw and explain General Selector Format. [6]
49

8:3
30
20

c) What is a Logical address, Linear address and Physical address? [6]


01
02

OR
6/2
GP
0/0

Q2) a) Explain the use of following instructions in detail : [6]


CE
83

8
i) SGDT ii) LIDT iii) SLDT

23
.23

b) Explain the Segment Translation Process with a neat diagram of 80386. ic-
16

tat
[6]
8.2

4s
.24

0:5

c) Enlist various types of system and non-system descriptors in the 80386.


91

Explain their use in brief. [6]


49

8:3
30
20
01
02

Q3) a) Write a short note on CPL, DPL, and RPL. [6]


6/2
GP
0/0

b) Explore the role of various fields in Page Level Protection. [6]


CE
83

c) List and explain various Privilege Instructions. [5]


.23

OR
16
8.2
.24

P.T.O.
49
Q4) a) What is call gate? Explain how it is used in calling functions with higher

8
23
privilege levels. [6]

ic-
b) Define the functions of Type Checking and Limit Checking in protection.

tat
[6]

4s
0:5
c) Explain different levels of protection? State the rules of protection check.

02 91
[5]

8:3
0
20
0/0 13
Q5) a) Explore the role of Task Register in multitasking and the instructions
0
6/2
.23 GP

used to modify and read Task Register. [6]


b) Draw and Explain the Task State Segment of 80386. [6]
E
83

8
C

23
c) Difference between Real Mode and Virtual 8086 Mode. [6]

ic-
OR
16

tat
8.2

4s
Q6) a) Explain the TSS descriptor of 80386 with a neat diagram. [6]
.24

0:5
b) Explore memory management in the Virtual 8086 Mode. [6]
91
49

8:3
c) List and explain various features of virtual 8086 Mode. [6]
30
20
01
02
6/2

Q7) a) Explain the process of Enabling and Disabling Interrupts in 80386. [6]
GP
0/0

b) Differentiate and Explain the Interrupt gate and Trap gate descriptor. [6]
CE
83

8
23
c) Differentiate between Microprocessor and Microcontroller. [5]
.23

OR ic-
16

tat
8.2

4s

Q8) a) With the help of the necessary diagram, explain the structure of IDT in
.24

80386. [6]
0:5
91
49

8:3

b) Explain different types of exceptions in 80386 with suitable examples.


30

[6]
20
01
02

c) Draw and Explain the Architecture of a Typical Microcontroller. [5]


6/2
GP
0/0
CE
83


.23
16
8.2
.24

[5869]-279 2
49

You might also like