BM01/QT04/T

Khoa: C-IN-IN T

PHIU XUT (1)

TI N / KHA LUN TT NGHIP
1. H v tn ngi xut: NGUYN TRNG HI

B mn: TVT
2. Tn ti: NG DNG KIT FPGA TRONG THIT K

S.

3. Tm tt ni dung: - Tm hiu cu trc FPGA ca Altera, Xilinx - Tm hiu VHDL, Verilog. - ng dng FPGA trong thit k s (s dng KIT DE2 ca Altera, Spartan3 ca Xilinx) 4. Mt s yu cu chnh : C kin thc v s, HDL. Lp trnh bng Verilog/VHDL. 5. ngh s sinh vin thc hin ti: 01 TP. HCM, ngy thng nm . Ngi xut (K v ghi r h tn)

Th.s Nguyn Trng Hi

BM01/QT04/T

Khoa: C-IN-IN T

PHIU XUT (2)

TI N / KHA LUN TT NGHIP
1. H v tn ngi xut: NGUYN TRNG HI

B mn: TVT
2. Tn ti:

THUT GII BT TAY GIA CC TRM GC TRONG THNG TIN DI NG.

- Tm hiu mi trng truyn sng trong thng tin di ng t bo - Tm hiu chuyn giao trong h thng thng tin di ng - Tm hiu cc gii thut chuyn giao - M phng, so snh kt qu gia cc gii thut

3. Tm tt ni dung:

4. Mt s yu cu chnh : C kin thc v thng tin di ng, iu khin t ng. Bit lp trnh MATLAB. 5. ngh s sinh vin thc hin ti: 01
-

TP. HCM, ngy thng nm . Ngi xut (K v ghi r h tn)

Th.s Nguyn Trng Hi

BM01/QT04/T

Khoa: C-IN-IN T

PHIU XUT (3)

TI N / KHA LUN TT NGHIP 1. H v tn ngi xut: NGUYN TRNG HI B mn: TVT Tn ti: H thng MIMO-OFDM bng rng. 2. Tm tt ni dung: Tm hiu khi nim c bn v MIMO. Gii thiu li ch ca m hnh knh MIMO bng rng (trong mi trng indoor). nh gi v xc nh cc k thut tch SDM hiu qu v cht lng v phc tp nh gi cc k thut trn kt hp vi OFDM. M phng 3.
-

4.

Mt s yu cu chnh : C kin thc v H thng vin thng. Bit lp trnh MATLAB. ngh s sinh vin thc hin ti: 01 TP. HCM, ngy thng nm . Ngi xut (K v ghi r h tn)

Th.s Nguyn Trng Hi

Khoa: C-IN-IN T

BM01/QT04/T

PHIU XUT (4)

TI N / KHA LUN TT NGHIP 1. H v tn ngi xut: NGUYN TRNG HI B mn: TVT Tn ti: MY THU MMSE trong TD-CDMA. 2. Tm tt ni dung: Tm hiu tng quan v h thng CDMA. Cc k thut tri ph c bn ( DS-CDMA). Cu trc my thu (DS CDMA). My thu MMSE trong TD - CDMA. M phng 3. 4. Mt s yu cu chnh : C kin thc v H thng vin thng. Bit lp trnh MATLAB. ngh s sinh vin thc hin ti: 01 TP. HCM, ngy thng nm . Ngi xut (K v ghi r h tn)

Th.s Nguyn Trng Hi