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An optimized non-blocking SOA switch architecture for high performance Tb/s network interconnects
ET Aw1, A Wonfor1, M Glick2, RV Penty1, IH White1
1: Electrical Engineering Division, University of Cambridge, 9 JJ Thomson Avenue, Cambridge, UK, CB3 0FA. Eta22@cam.ac.uk 2: Intel Research Pittsburgh, 4720 Forbes Avenue Suite 410, Pittsburgh, PA 15213, USA. Madeleine.glick@intel.com
Abstract: A practical non-blocking 32x32 SOA based switch architecture is presented which minimises the number of required cascaded stages while also requiring relatively few SOAs. This switch is robust and suitable for 8x10Gb/s wavelength striped operation. Keywords: Optical networks, SOA, switch architecture Introduction Short link length applications requiring high capacity data routing such as server backplanes and system area networks pose a need for switch architectures which support low latency routing. Non-blocking switch architectures are useful for low latency routing as they avoid the need to prioritise and reschedule transmissions. Architectures with non-blocking characteristics for photonic networks, such as the Crossbar, Benes, Spanke-Benes and Tree, have been studied extensively [1]. A range of optical switch technologies have therefore been considered for these applications. Here, semiconductor optical amplifiers (SOA) have attracted much interest as they have the potential for nanosecond re-configurability, low loss, broad spectral performance and high extinction ratio operation [2]. They have been used as switches in test beds to investigate various optical network implementations [3-7]. In these test beds, 160Gb/s optical packet routing [3], 12x12 SOA switch networks [4], terabit internet routers [5] and network architectures for supercomputing applications [6] have been demonstrated. However, applications are likely to require both high data capacity and high port count. Non-blocking routers that are wavelength transparent can require a large number of cascaded switching elements, which can cause strong signal degradation. To date this functionality has been difficult to realise using SOA based switches as the cost and control complexity increases with the number of switching elements, while signal degradation due to amplified spontaneous noise and saturation induced distortion also increases. In this paper, a new 32 x 32 rearrangeably non-blocking architecture is presented which can be realised practically using SOAs. The design is optimised in terms of both the total number and cascades of SOAs and is described and analysed in the following sections. 2. Switch Design Methodology The Benes network (which is a Clos network built from 2x2 switches), requires the lowest number of switching elements for a non-blocking switch [4]. A large Benes
(a) 32x32 Benes

16x16

16x16

(b) 4x4 Benes (c) 4x4 Tree

Figure 1 : (a) 32x32 Benes network with input/output 2x2 switching stages and two middle stage cores (b) 4x4 Benes network. (c) 4x4 B&S single stage tree network. 1c has fewer cascades than 1b and can be used as the middle cores of a Benes networks.
2400 2000
Number of SOAs

1600 1200 800 400 0 0 20 40

NxN Proposed Architecture Benes Crossbar Tree Spanke-Benes

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80

Figure 2 : Comparison of number of SOAs in various sizes of different switch architectures. The crossbar in this comparison is one that is made of 2x2s and the tree architecture used is the single stage B&S

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network can be recursively constructed by using two smaller Benes networks as the middle stage. For example, as shown in Figure 1a, a 32x32 switch can be built from two 16x16 Benes switches as the middle stage, with the addition of sixteen 2x2 switches at the input and output stages respectively. As long as the two switches in the middle stage remain non-blocking, it is possible to substitute the middle Benes networks with another architecture and still retain the switch functionality. In this design, a single stage broadcast and select (B&S) tree architecture is chosen. This single stage architecture 2 scales with a switch size of N which is efficient when N, the number of ports, is small. Figure 1a shows the design of the switch with input/output 2 x 2 switch stages and two middle stage switching cores. Figure 1b & 1c show simplified representations of Benes and B&S tree cores. It is evident that there are fewer cascades in Figure 1c than 1b.
20 Max Number of Cascades 16 12 8 4 Proposed Architecture Benes Crossbar Tree Spanke-Benes

Table 1 : Losses within the proposed architecture owing to the B&S middle stage, assuming 3.5dB loss per splitter

Size 8x8 16x16 32x32 64x64 128x128

Maximum inter-stage splitting losses (dB) 11.5 14 17.5 21 24.5 4. Results

A testbed [7] constructed with 3 cascaded 1.5 micron wavelength SOAs using the appropriate attenuation map to represent paths through the 32 x 32 switch. Two different paths are populated in the switch and packets are routed to two different destinations. The packets contain data at 80Gb/s which are striped over 8 wavelengths (each at 10Gb/s). The switch operates with an input power dynamic range of more than 20dB for a 2dB power penalty. Detailed results will be shown in the conference. 5. Conclusions An optimised architecture for a 32 x 32 port SOA based optical switch is demonstrated which reduces the number of cascaded SOAs from 9 to 3, compared to an equivalent Benes network while requiring only 11% more SOAs.
6. References

0 0 20 40 NxN 60 80

[1]

R. Spanke, Architectures for guided-wave optical space switching systems IEEE Commun. Mag., vol.25, no. 5, pp. 42- 48, May 1987 K.A. Williams, G.F. Roberts, T Lin, R.V. Penty, I.H. White, M Glick, D McAuley, Integrated optical 2x2 switch for wavelength multiplexed interconnects, IEEE J. Sel. Topics Quantum Electron., vol.11, no. 1, pp 78- 85, Jan.Feb. 2005 E.T. Aw, T. Lin, A. Wonfor, R.V. Penty, I.H. White, 4x40Gb/s Packet Switching and Fault Tolerance, in Optical Fiber Communication Conference (OFC 2007) (Optical Society of America, Washington, D.C., 2007), paper OThF2 A Shacham, B.A. Small, O. Liboiron-Ladouceur, K. Bergman, A fully implemented 12x12 data vortex optical packet switching interconnection network, Journal of Lightwave Technology, Vol.23, Iss.10, Oct. 2005 Pages: 3066- 3075 F. Masetti, D. Chiaroni, R. Dragnea, R. Robotham, and D. Zriny, "High-speed high-capacity packet-switching fabric: A key system for required flexibility and capacity," J. Opt. Netw., vol. 2, no. 7, pp. 255265, Jul. 2003. R. Hemenway, R. Grzybowski, C. Minkenberg, R. Luijten, Optical-packet-switched interconnect for supercomputer applications, J. of Opt Netw, vol. 3, no. 12, pp. 900-913, Dec 2004 E.T. Aw, T. Lin, A Wonfor, M. Glick, K.A. Williams, R.V. Penty, I.H. White, Layered control to enable large scale SOA switch fabric in European Conference on Optical Communications (ECOC 2006) Paper Th1.2.5 W. Dally, B. Towles, Principles and Practices of Interconnection Networks, chapter 6, pp. 111-144, Morgan Kaufmann, 2003.

[2] Figure 3 : Comparison of the number of SOA cascade stages in various size of different switch architectuers The crossbar in this comparison is one that is made of 2x2s and the tree architecture used is the single stage B&S [3]

3. Discussion Figure 2 shows the number of SOAs required for alternative architectures, with our proposed architecture needing 640 SOAs for a 32 x 32, only 11% more than the Benes. Figure 3 shows that our design requires only 3 cascaded SOAs compared with 9 cascaded SOAs in the Benes architecture. It can be seen that the number of SOAs of the proposed architecture loses its advantage for switch sizes above 32 x 32. However it still retains the advantage of a fixed number of cascades at 3, compared to the Benes which scales at 2Log2N-1 stages. A property of the proposed architecture is that the number of splitting stages scales as Log2N. The losses between SOAs are shown in Table 1, which assumes 0.5 dB excess loss per split. It can be seen that the 17.5 dB splitting loss for a 32 x 32 switch can easily be compensated by the SOA gain which can be in excess of 22dB. The proposed architecture can be integrated using 3 banks of SOAs with fewer intermediate passive waveguides than the equivalent Benes scheme, which would require the integration of 9 banks of SOAs and waveguides.

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