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William Stallings
Computer Organization
and Architecture
9th Edition
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Chapter 2
Computer Evolution and Performance
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History of Computers
First Generation: Vacuum Tubes
ENIAC
Electronic Numerical Integrator And Computer
Designed and constructed at the University of Pennsylvania
Started in 1943 – completed in 1946
By John Mauchly and John Eckert
World’s first general purpose electronic digital computer
Army’s Ballistics Research Laboratory (BRL) needed a way to supply trajectory tables for
new weapons accurately and within a reasonable time frame
Was not finished in time to be used in the war effort
Its first task was to perform a series of calculations that were used to help determine the
feasibility of the hydrogen bomb
Continued to operate under BRL management until 1955 when it was disassembled
ENIAC
Major
Memory drawback
consisted
was the need
Occupied of 20
Contained Capable
1500 Decimal accumulators,
more of for manual
Weighed square 140 kW rather each
than 5000 programming
30 feet Power than capable
18,000 additions by setting
tons of consumption binary of
vacuum per switches
floor machine holding
tubes second and
space a
10 digit plugging/
number unplugging
cables
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John von Neumann
EDVAC (Electronic Discrete Variable Computer)
First publication of the idea was in 1945
Stored program concept
Attributed to ENIAC designers, most notably the mathematician
John von Neumann
Program represented in a form suitable for storing in memory
alongside the data
IAS computer
Princeton Institute for Advanced Studies
Prototype of all subsequent general-purpose computers
Completed in 1952
Structure of von Neumann Machine
+ Review Agenda
Von Neumann Architecture
5 component design of the stored program digital computer
the instruction cycle
Basic
Exceptions
instruction architecture
software design
hardware circuits
Digital Design
Boolean logic and gates
Basic Combinational Circuits
Karnaugh maps
Advanced Combinational Circuits
Sequential Circuits
+ von Neumann Architecture
Principles
Data and instructions are both stored in the main memory(stored
program concept)
The content of the memory is addressable by location (without
regard to what is stored in that location)
Instructions are executed sequentially unless the order is
explicitly modified
The basic architecture of the computer consists of:
Computer
Data
CPU Main
Bus Memory
Control
+ von Neumann Architecture
A more complete view of the computer system architecture
that integrates interaction (human or otherwise) consists of:
Computer System
Computer
Input
Data Device
CPU Main
Bus Memory Bus
Control Output
Device
Five Main Components: Bus
1. CPU
2. Main Memory (RAM)
Secondary
Storage
3. I/O Devices
Device
4. Mass Storage
5. Interconnection network (Bus)
Another view of a digital computer
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IAS Memory Formats
Both data and instructions are
The memory of the IAS stored there
consists of 1000 storage
locations (called words) of Numbers are represented in
binary form and each instruction
40 bits each is a binary code
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Structure
of
IAS
Computer
+ Registers
Memory buffer register • Contains a word to be stored in memory or sent to the I/O unit
(MBR) • Or is used to receive a word from memory or from the I/O unit
Memory address • Specifies the address in memory of the word to be written from
register (MAR) or read into the MBR
Instruction register (IR) • Contains the 8-bit opcode instruction being executed
Instruction buffer • Employed to temporarily hold the right-hand instruction from a
register (IBR) word in memory
• Contains the address of the next instruction pair to be fetched
Program counter (PC) from memory
Accumulator (AC) and • Employed to temporarily hold operands and results of ALU
multiplier quotient (MQ) operations
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IAS
Operations
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Table 2.1
The IAS
Instruction
Set
Table 2.1 The IAS Instruction Set
Table 2.2
Computer Generations
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Computer Generations
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Microprocessors
The density of elements on processor chips continued to rise
More and more elements were placed on each chip so that fewer
and fewer chips were needed to construct a single computer
processor
1971 Intel developed 4004
First chip to contain all of the components of a CPU on a single
chip
Birth of microprocessor
1972 Intel developed 8008
First 8-bit microprocessor
1974 Intel developed 8080
First general purpose microprocessor
Faster, has a richer instruction set, has a large addressing
capability
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Problems with Clock Speed and
Login Density
Power
Power density increases with density of logic and clock speed
Dissipating heat
RC delay
Speed at which electrons flow limited by resistance and
capacitance of metal wires connecting them
Delay increases as RC product increases
Wire interconnects thinner, increasing resistance
Wires closer together, increasing capacitance
Memory latency
Memory speeds lag processor speeds
The use of multiple
Multicore processors on the same chip
provides the potential to
increase performance
without increasing the clock
rate
Strategy is to use two simpler
processors on the chip rather
than one more complex
processor
With two processors larger
caches are justified
As caches became larger it
made performance sense to
create two and then three
levels of cache on a chip
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Many Integrated Core (MIC)
Graphics Processing Unit (GPU)
MIC GPU
Leap in performance as well Core designed to perform
as the challenges in parallel operations on graphics
developing software to exploit data
such a large number of cores
Traditionally found on a plug-in
The multicore and MIC graphics card, it is used to
strategy involves a encode and render 2D and 3D
homogeneous collection of graphics as well as process
general purpose processors video
on a single chip
Used as vector processors for a
variety of applications that
require repetitive computations
+ Overview
ARM
Results of decades of design effort on
complex instruction set computers Intel
(CISCs)
Incorporates the sophisticated design
principles once found only on
mainframes and supercomputers
An alternative approach to processor
x86 Architecture
design is the reduced instruction set
computer (RISC)
The ARM architecture is used in a
wide variety of embedded systems
and is one of the most powerful and
best designed RISC based systems on
the market
In terms of market share Intel is
ranked as the number one maker of
CISC
microprocessors for non-embedded
systems RISC
General definition: Embedded
“A combination of computer
hardware and software, and
perhaps additional mechanical or
other parts, designed to perform a Systems
dedicated function.”
+ In many cases, embedded systems are
part of a larger system or product, as in
the case of an antilock braking system in
a car.
+ Figure 2.12
Possible Organization of an Embedded System
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Acorn RISC Machine (ARM)
Family of RISC-based Widely used in PDAs and
microprocessors and other handheld devices
microcontrollers
Chips are the processors in
Designs microprocessor and iPod and iPhone devices
multicore architectures and
licenses them to Most widely used embedded
manufacturers processor architecture
Chips are high-speed Most widely used processor
processors that are known for architecture of any kind
their small die size and low
power requirements
ARM Design Categories
ARM processors are designed to meet the needs of three
system categories:
Secure applications
Smart cards, SIM cards, and
payment terminals
Application platforms
Embedded real-time
systems Devices running open
Systems for storage, operating systems including
automotive body and power- Linux, Palm OS, Symbian OS,
train, industrial, and and Windows CE in wireless,
networking applications consumer entertainment and
digital imaging applications
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Benchmarks
MIPS (million instructions per second) measures the number
of integer instructions a processor can execute per second,
while MFLOPS (million floating-point operations per second)
measures the number of floating-point operations a
processor can execute per second.
Issues:
MIPS may be misleading because the number of instructions
executed per second can vary significantly depending on
the instruction set architecture (ISA) and the complexity of
the instructions.
MFLOPS is an important metric for evaluating the
performance of applications that rely on floating-point
calculations, such as those found in scientific simulations,
graphics processing, and machine learning.
Benchmarks
For example, consider this high-level language statement:
A = B + C /* assume all quantities in main memory */
With a traditional instruction set architecture, referred to as a complex
instruction set computer (CISC), this instruction can be compiled into
one processor instruction:
add mem(B), mem(C), mem (A)
On a typical RISC machine, the compilation would look
something like this:
load mem(B), reg(1);
load mem(C), reg(2);
add reg(1), reg(2), reg(3);
store reg(3), mem (A)
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Thank You
