latch_nand library ieee; use ieee.std_logic_1164.all; ibrary altera; use altera.altera_primitives_components.

all; -----------------------------Entity tipo_NAND is Port ( snand, rnand: in bit; Q: buffer bit); End tipo_NAND; Architecture funcionamiento of tipo_NAND is Begin Process (snand, rnand) Begin If snand = '0' then elsif rnand = '0' then else end if; end process; end funcionamiento;

Q <= '1'; Q <= '0'; Q <= Q;

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