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Intel Ivy Bridge
Intel Ivy Bridge
IVY BRIDGE
IVY BRIDGE
First chip to use Intel's 22nm tri-gate transistors Mobile Ivy Bridge - First to bring 4 cores into a 35W TDP First to use tri-gate, also called 3D, transistors 37 percent faster & use less than half the power of 2D transistors
3D Transistors
3-D Tri-Gate transistors form conducting channels on 3 sides of a vertical fin structure, providing "fully depleted" operation Transistors have now entered the third dimension
IVY BRIDGE
IVY BRIDGE
4-wide with support for fusion of both x86 instructions & decoded uOps Structures within the chip are now better optimized for single threaded execution The number of execution units hasn't changed in Ivy Bridge Ivy Bridge's divider has twice the throughput of the unit in Sandy Bridge Inclusion of a very high speed digital random number generator (DRNG) & supervisory mode execution protection (SMEP).
High quality/high perfromance DRNG Designed to be Standards compliant New instruction: RDRAND - Available at all privilege levels/operating modes RDRAND is enumerated via CPUID.1.ECX Can generate high quality random numbers at 2 - 3Gbps
Ivy Bridge introduces SMEP to help prevent Escalation of Privilege (EoP) security attacks Prevents execution out of untrusted application memory while operating at a more privileged level If CR4.SMEP set to 1 & in supervisor mode (CPL<3), instructions may not be executed from a linear address for which the user mode flag is 1 Available in both 32- & 64- bit operating modes SMEP is enumerated via CPUID.7.0.EBX
Last level cache (L3) is still shared via a ring bus between all cores Quad-core Ivy Bridge CPUs will support up to 8MB of L3 cache The private L1/L2s haven't increased from their sizes in Sandy Bridge The memory controller also remains relatively unchanged, aside from some additional flexibility Mobile IVB supports DDR3L in addition to DDR3, enabling 1.35V memory instead of the standard1.5V DDR3
Voltage Characterization:
Intel defines 3 different voltages for every Sandy Bridge CPU: LFM, nominal and turbo LFM is the lowest frequency the CPU can run at (e.g. completely idle) Nominal is the frequency it is specified to run at (e.g. 3.3GHz for a 2500K) Turbo is the highest available turbo frequency (e.g. 3.7GHz for a 2500K).
An Ivy Bridge notebook with an optional dock that could enhance the cooling capabilities of the machine When undocked the notebook's processor would operate at a max TDP of 17W. Ultra portable chassis on the go, and higher clock speeds while docked
Power Optimizations
Architecture plus 22nm offers: - Up to ~1/2 power at same performance * ~Double the performance / watt Co-issue: - Extended Co-issue on EU to many more operation - More IPC per unit area - therefore less power to leakage L3$: - Less BW need from LL$ = Less Energy spent
Conclusion
Sandy Bridge brought about a significant increase in CPU performance But Ivy seems almost entirely dedicated to addressing Intel's aspirations in graphics. We might see this trend continue, get more effective architectures by the developments in fabrication technologies.
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