An Example Design Scenario

A Traditional Design Cycle

A Traditional Design Cycle

A Traditional Design Cycle

Design Change????

A Traditional Design Cycle

Another Design change?

A Traditional Design Cycle

A Traditional Design Cycle

The Power of PSoC Mixed Signal Array

Unmatched integration
Complete system level
solution with digital and
analog peripherals, an 8bit microcontroller, and
embedded FLASH memory
Ultimate Flexibility
Enables the designers to
easily make revisions to
meet ever-changing
system requirements (Up
to the last minute!)
Real-Mixed Signal
Programmability
A complete set of analog
and digital peripherals
that can be configured to
design specifications

PSoC System on Chip Benefits

What has changed for you?

The search for the perfect part is over

PSoC reduces your systems parts count
PSoC adapts to changing Customer Requirements
PSoC simplifies purchasing and inventories

Better than a custom part

No NRE

No Waiting

No Minimum quantities

Security Sensor Application

Traditional Approach
Competitive Solutions

Op
amp

LP
filter

A/D

Microcontroller

D/A

Sensor
Digital Outputs

LEDs

Op
amp

 We can Do So Much More!

PSoC Microcontrollers

Op
amp

LP
filter

A/D

Microcontroller

D/A

Digital Outputs

LEDs

Op
amp

Parts Reduction
Do you use these external components?

Op Amps and Comparators

PWMs
Filter components
Analog drivers
Transistors / Buffers
External ADC
High speed crystal
Pseudo Random Sequence Generator

These are external components that

could be integrated with a PSoC design

Why Choose PSoC?

Parts Reduction

90+ Parts

20+ Parts

Programmable Systems on Chip(PSoC)

Single chip contains:
Traditional processor
Traditional peripherals
CPLD/FPGA hardware
Analog hardware
Programmable analog hardware
Primary advantages are reduced part count,
reduced cost, increased flexibility and
increased reliability
Several now on the market
Actel SmartFusion
Xilinx
Cypress PSoC

Cypress PSoC Family

PSoC 1
The original design
8 bit M8C core, up to 24MHz, 4 MIPS
Flash Memory up to 4K to 32KB program space.
SRAM 256B to 2KB data space
Available since 2001
Power PSoC
Simple devices, for LED lighting and motor control
Have high current FETs on board (1A range)
PSoC 3
Redesign of development tool chain
Redesign of analog blocks
Enhanced 8051 core, 33 MIPS
Production parts available December 2010
PSoC 5
Same base architecture as PSoC 3 + 2 additional SAR
ADCs
32 bit ARM Cortex M3 core, 100 Dhrystone MIPS
Sampling now, production parts Q2 2011

PSoC Microcontroller Families

CY8C25xxx/26xxx

CY8C27xxx

8 Digital PSoC blocks

12 Analog PSoC blocks
16k Flash
128-256 bytes SRAM
6-44 IO
CY8C24xxx

Improvements:
- Analog
- Digital

4 Digital PSoC blocks

6 Analog PSoC blocks
4k bytes Flash
256 bytes SRAM
6-16 IO

CY8C21xxx
4 Digital PSoC blocks
12bit ADC
4k bytes Flash
256 bytes SRAM
6-16 IO

Cypress PSoC Family

Programmable in C or assembly
C is the default / recommended language
Low cost of entry
$50 to $250 for development kits
Development tools are a free download
PSoC Creator
PSoC Programmer
C Compiler (Keil for PSoC3, GCC for PSoC5)
Good balance of processor, analog blocks and
digital blocks
Single chip solution for many designs
Can start with the PSoC 3 and easily migrate to
PSoC 5 when available / needed
Plan for this in your design to make it smooth
Only a recompile needed in many cases
CANNOT migrate to/from PSoC 1

PSoC = Programmable System-on-Chip

It is a mixed signal controller with configurable
digital and analog resources with on-board MC.
Create your customized chip
User Defines :

What Functions Appear

When They Appear
How They Interconnect

PSoC Blocks
FLASH
Program
Memory

PSoC Blocks

M8C
8-Bit
Microcontroller
Core

Analog
PSoC Blocks
Programmable
Interconnect

X2

32 kHz Crystal
Oscillator

Internal 32 kHz
Oscillator

Watchdog
Timer

Sleep
Timer

Temperature
Sensor

Low Voltage
Detection

Power-on-Reset
Control

Addr/Data

Interrupt
Controller

SRAM

Addr/Data

Internal Address/Data Bus

X1

Precision Oscillator
and PLL

Internal Address/Data Bus

Voltage
Reference

Digital
PSoC Blocks

Decimator

MAC
Multiply/Accumulate

General Purpose
I/O
Internal I/O Bus

Pin by Pin Configurable

I/O Transceivers
Total I/O Pin Count
Varies by Device

PSoC BlocksThe Underlying Hardware

Digital Blocks (8)
Analog Blocks (12)
Two Types
Three Types
Basic Type (4)
Communications Type
Continuous Time (4)
(4)
Switch Capacitor A (4)
Programmed at the
Function Level
Switch Capacitor B (4)
Not programmable at the
Gate Level

Digital PSoC Blocks

Eight 8-Bit Digital PSoC Blocks Available

Four Digital Comm Blocks
All Basic functions, plus
SPI Master
SPI Slave
I2C
IrDA
CRC16
Async Rx
Async TX
UART

Four Digital Basic Blocks

Timer, Counter, PWM
Dead Band Generator (2 Phase
Underlapped Clock)
Pseudo Random Source (PRS)
Cyclic Redundancy Check
Generator (CRC)

DR0

DR1
DB

DB

DR0

DB
DR1

DI

IN
PROC
DATA

DO

CLK

DB
DI

CLK

CLKS

COMM
ONLY

INPUT
REG

CR1

CONFIG
TIME, CTR, CRCPRS, UART, ETC

DO

OUT
PROC

TXD
RXD

DR2

TXD
CLK

RXD
COMM
ONLY

Analog PSoC Blocks

Port Inputs

CC

Bloc Outputs
OBUS

PWR

CP
CK

AGND

Amplifiers
Comparators
Filters: 2, 4, 6 pole
LP,BP,HP,Notch
ADCs: Incremental, D-S, SAR
DACs
CF
16-32 C

CC
Inputs

A.IN
CA Inputs
REF Inputs

f1

CA
0-31 C

N[2:0]

f2

RESISTOR
MATRIX

SC Bloc
VSS

Continuous Time

REF Inputs

f1

f2

A.REF
f2+!B.SW

CS

CB
0-31 C

CBUS

CA
0-31 C

f2+AZ

CF
16-32 C

(f2+!AZ)*F.IN1
f1*F.IN0

f1*!AZ

A.SIGN
CB
0-31 C

f2+!B.SW

CB Inputs

PWR

B.IN
B.IN

F[1:0]

CT Bloc
AGND

A.IN

OBUS

OS*f2B
f1*B.SW

OBUS

f1*B.SW

f1

CS
CBUS
PWR

Switched Cap A

P(IN)
AGND
VREFVREF+
T[2:0]

CA Inputs

f1*!AZ

CB Inputs

OUT
GOUT
LOUT

f1*AZ

f2+AZ

OS

AGND
VREFS

CARR

SN

OBUS
G

Bloc Inputs

A.SIGN
A.REF

F2

(f2+!AZ)*F.IN1

OS*f2B
f2

VDD

CC
0-31 C

f1*F.IN0

C.IN

CBUS

P[2:0]

f1*AZ
CC
0-31 C

CEN

VREF

Switched Cap B

World-Class MCU Features

24 MHz/4 MIPs Operation at 5V
12 MHz Operation at 3.3V
Single-cell (1.2V to start) Operation at up to 24MHz
With Built-in Voltage Pump and Three Passive
Components
Eight-Level Low Voltage Detection/Alert
Built-In Multiply-Accumulate Hardware (MAC)
8 X 8 Multiply, 32-Bit Accumulate
Answer Available Immediately on Next Instruction
Cycle
2.5% Accurate Oscillator with no ext. Components
PLL for Precise Time-base With Inexpensive Watch
Crystal
Flexible Sleep Modes, as Low as 5A in Standby

 All Flash Program Memory (4 to 16 Kbytes)

EEPROM Emulation in Flash
Four Memory Protection Modes
Allows Factory or Field Upgrade on Individual
64-byte Blocks
From One Block up to the Entire Flash Memory
Protectable
Robust Read/write Protection Algorithm for
Added Security
In-System Programmable
Supports Production Test/Calibration ReProgramming
Supports Field Upgrade of firmware or
configuration

 Configurable I/O Pins

Every Pin Can Source 10mA and Sink 25mA
Integrated/Selectable Pull-up and Pull-down
Resistors
Selectable as Interrupt Source on Either Edge or
Change in State

8 Muxable Analog Inputs (except 8-pin device)

Up to 4 Analog Outputs w/ 40mA Integrated Drive
4 Direct Input Analog Lines (except 8-pin and 20pin devices)

The PSoC Architecture

UART

PWM

PWM

SPI