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ARCHITECTURE
OF 8051
Pins of 8051
contd
A / D Address or data.
A Address.
EA External access or external enable.
Vpp EPROM voltage
Vcc +5v supply.
RST Reset pin
PSEN Program enable
RxD Receive data
TxD Transmit data
INTo Interrupt zero
INT1 Interrupt one
Pins of 8051
To Timer zero
T1 Timer one
XTAL1 Crystal input one
XTAL2 Crystal input two
Po Port zero
P1 Port one
P2 Port two
P3 Port three
WR Write enable
RD Read enable
ALE-address latch enable
contd
Input on pin 9
Used for resetting microcontroler. Logical high signal
on these pin resets the microcontroller (clears all the
registers)
PSEN bar
Reset
contd
EA bar
Port 0
Port 1
Port 2
Port 3
Architecture of 8051
microcontroller
I/O ports
Timer & Counter
Serial Data Communication ports
CPU
-
Registers
Accumulator and B
Registers
ACCUMULATOR
One of the Special Function Register (SFR)
8 bit general purpose register
Used for storing one of the operand and results in
large number of instructions.
Used also in transferring data from one register to
other register
B Register
An SFR,
Used with Accumulator for multiplication & division
operations
Stores upper 8 bit of the product & remainder of
division
Stores carry in addition and barrow in subtraction
operations.
instruction's execution
CY AC F
0
RS1 RS0 O
V
Flags of PSW
+
1
D6
0
0
1
D5
0
0
0
D4
1
1
1
D3 D2 D1 Do
1
0 0 0
1
0 0 0
0
1 1 0
Flags of PSW
contd
RS0
0
1
0
1
Register bank
0
1
2
3
Flags of PSW
contd
DPTR
PC
General Purpose
Registers
RS0
0
1
0
1
Register bank
0
1
2
3
Address
00 - 07H
08 - 0FH
10 - 17H
18 - 1FH
Stack Pointer
Stack pointer
Register Bank 3
Register Bank 2
Register Bank 1( Stack)
Register Bank 0
Example:
MOV
MOV
MOV
PUSH
PUSH
PUSH
PUSH OPERATION
R6,#25H
R1,#12H
R4,#F3H
R6
R1
R4
0BH
0BH
0BH
0BH
0AH
0AH
0AH
0AH
F3
09H
09H
09H
12
09H
12
08H
08H
08H
25
08H
25
Start SP=07H
25
SP=08H
SP=09H
SP=0AH
Example:
MOV
MOV
MOV
PUSH
PUSH
PUSH
POP
POP
POP
0BH
R6,#25H
R1,#12H
R4,#F3H
R6
R1
R4
R4
R3
R1
0BH
0BH
0BH
0AH
0AH
09H
09H
0AH
F3
0AH
09H
12
09H
08H
25
08H
Start SP=0AH
POP OPERATION
12
25
SP=09H
08H
25
SP=08H
08H
SP=07H
Internal Memory
Internal Memory
Data Memory 128 byte on-chip RAM
Program Memory 4K byte on-chip ROM
Program Memory
Data Memory
FFH
80H
7FH
External data
memory of size
64kBytes can be
used.
8051- RAM
MSB
7FH
2FH
2EH
2DH
2CH
2BH
2AH
29H
28H
27H
26H
25H
24H
23H
22H
21H
20H
17H
10H
08H
00H
LSB
Scratch Pad Area
7F
77
6F
67
5F
57
4F
47
3F
37
2F
27
1F
17
0F
07
7E
76
6E
66
5E
56
4E
46
3E
36
2E
26
1E
16
0E
06
7D
75
6D
65
5D
55
4D
45
3D
35
2D
25
1D
15
0D
05
7B
73
6B
63
5B
53
4B
43
3B
33
2B
23
1B
13
0B
03
Register Bank 3
Register Bank 2
Register Bank 1
Register Bank 0
7C
74
6C
64
5C
54
4C
44
3C
34
2C
24
1C
14
0C
04
7A
72
6A
62
5A
52
4A
42
3A
32
2A
22
1A
12
0A
02
79
71
69
61
59
51
49
41
39
31
29
21
19
11
09
01
78
70
68
60
58
50
48
40
38
30
28
20
18
10
08
00
DESCRIPTION OF
INTERNAL RAM
The 8051 has 128 bytes of internal data memory which are
assigned address from 00 to 7FH . These memory area are
divided into 3 different groups.
Total of 32 bytes from location 00 to 1FH set aside for register
banks. They are arranged as 4 register banks Bo to B3 ,
consisting of 8 registers Ro to R7.
The total of 16 bytes from location 20H to 2FH are set aside for
bit addressable area , in general in microprocessor data
transmission is one byte at a time, so if we want to change one bit
we have to Access the hole byte , but in 8051 we can access one
bit instead of one byte. These ability access data in a single bit
instead of hole byte makes 8051 one of the more powerful 8 bit
microcontroller . Instruction that are used for bit addressable
operation are;
SETB bit.
CLR bit.
3.From 30H to 7FH is kept aside for storing some data & we
can call these as scratch pad RAM.
TIMER
Timer 0 Register
TH0
D1
5
D14
D1
3
D1
2
D11
TL0
D1
0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Timer 1 Register
TH1
D1
5
D14
D1
3
D1
2
D11
TL1
D1
0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
TMOD Register
TMOD Register
C/T
This bit represent whether the timer or counter
is used .
If C/T=0 then it is a timer operation ,
If C/T=1 then it is a counter operation.
M1
Mo
Gate
M1 is mode bit 1.
Mo is mode bit zero.
A 8 bit register
The upper 4 bit is set aside to store timer 0 & timer 1 .
TF means timer over flow .
TR means timer start .
TCON is a bit addressable register
If TR0=1 , it means that timer zero is to be started .
If TF 0=1,it means over flow has occurred in timer 0,else
no overflow
The lower 4 bits are set aside for controlling & interrupt
bits .
TF1
TR1
TF0
Serial data
communication
Addresses of SFR