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Chapter 1

Engr. Zeba Idrees

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Embedded System
 Same concept as used by digital computers.
 Designed for specific application.
 A combination of hardware and software which together form a
component of a larger machine.

 An example of an embedded system is a microprocessor that


controls an automobile engine.

 An embedded system is designed to run on its own without human


intervention, and may be required to respond to events in real time.
 A reactive system continuously
 accepts inputs
 performs calculations
 generates outputs
 A real time system
 Specifies an upper bound on the time required to
perform the input/calculation/output in reaction to
external events
 Interacts with physical environment
Embedded System
Medical
Automotive

 Embedded Systems are


Communications
Military
everywhere
 Ubiquitous, invisible
 Hidden (computer inside)
 Dedicated purpose
 Small size , Low cost low
Comsumer Industrial power consumption made
their use wider.

Embedded system
Microcontroller LM3S or TM4C Electrical,
mechanical,
Processor chemical,
I/O Ports or
RAM optical
devices
ROM DAC Analog
Bus ADC signals
Block Diagram of Embedded Systems
Embedded Systems Hirarchy

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Applications
Areas
Application Areas

• Communications , TV
• stereo
• remote control
• phone / mobile phone
• refrigerator
• microwave
• washing machine
• electric tooth brush
• oven / rice or bread cooker
• watch
• alarm clock
• electronic musical instruments
• electronic toys (stuffed animals, handheld toys, pinballs, etc.)
• medical home equipment (e.g. blood pressure, thermometer)
Design Parameters of Embedded Systems

 A good embedded system


 Better tradeoff b/w price and performance
 Design parameters
 Power consumption
 Speed of execution
 system size and weight
 Performance accuracy
 Selection Parameters
 Processing rate and processor size
 I/O interfacing ability
 Memory Size

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Building blocks of Microcontrollers

 Key difference b/w micro controller and


microcomputers?

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Building blocks of Microprocessor

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Working

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Ports

 Physical connections between microcontroller


and external word devices
 Can be configured as input or output based on
the device attached
 LEDs
 Switched, Key pad etc.

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I/O port classification

 Information exchange B/W microcontroller and


external devices’;
 Parallel Ports
 Group of line
 Serial Ports
 One line

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Memory Information Storage Device

 Digital computer store information in binary digits


called bits.
 These bits used to represent operands operator and
addresses
 To possible states 1 and 0
 Store this information in digital electronics circuits
such as CMOS.
 Address ability
 Bytes addressable memory
 Bit addressable memory
 Word addressable memory
 Half word addressable memory (16 bits)

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Memory Groups

 Based on read and write capabilities


 Two main categories (Both can be accessed
randomly)
 RAM
 Allow read and write operation by the processer
 ROM
 Write operation required special hardware capability
 How many time write operation can be performed
depend on the type of ROM

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Read Only Memory

 Can store information permanently even no


power is applied.
 Non volatile
 Store normally Instruction and program code
 boots sequence that does not vary over time.

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ROM Types

 Programmable ROM (PROM)


 Can be program only once
 Any change will required replacement of the chip
 Erasable Programmable ROM (EPROM)
 Can be reused
 Information was erase and written with the help of UV
light
 Can not change while installed in the system
 Need to be completely erase to made any change

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Conti.

 Electrically Erasable Programmable ROM


(EEPROM)
 Same as EPROM
 Can be erase and rewritten by applying electrical
signal two storage cells.
 Can be done on chip
 Limited in their capability
 Only allow signal read and write operation making
them slow.

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Conti.

 Flash memory
 Type EEPROM
 Allow read and write operation in large multi byes
blocks.
 High speed and low cost
 Limited nos. of read and write cycles

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Random Access Memory

 Not limited by read and write cycles


 Suitable for storing data that is updated frequently
 Faster than those ROMs
 Types of RAM
 Dynamic RAM
 Most commonly used type
 Each memory cell made up of two transistor and one capacitor
 T act as switch while C hold the charge
 As capacitor charge leaks voltage representing 1 need to be
refresh (nos. of time in one second)

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Conti.

 Static RAM
 Employs a flip-flop for storing a bit.
 Required 4 to 6 transistor
 No refreshing circuits
 Faster than DRAM
 Other types
 SDRAM (Synchronous)
 DDRAM (Double data)
 RDRAM (Rambus)

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Aligned and Unaligned Memory Access

 If memory access of size half word is performed


from an even address then this memory is aligned
access.
 If odd address is used then this memory is
unaligned access.
 For 32 bits word memory access word aligned mean
data is stored on a word boundary that is memory
address access is divisible by 4.
 A word memory access from an address not
divisible by 4 is termed as unaligned word access.

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Microprocessor Architecture Classification

 Based on Instruction set architecture


 Two aspects:
 Complexity of instructions ,
 Instructions operands

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Conti.

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Complexity Based ISA Classification

 Complex instruction set computer (CISC)


 Use early computers, where processor than memory
 Advantage: signal instruction can perform many
instructions
 Required many processors to complete
 Relatively small no. of complex instructions
 High code density
 Complexity is embedded in the processor hardware,
making the compilation tools design simpler
 Intel x86 and free scale 9s12

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Conti.

 Reduce instruction set computer (RISC)


 Suitable where processor speed matches that of memory
 Simplify instructions
 Each complex operation is broken into multiple simplify
operations
 Execute in a single processor clock cycle (may take
multiple CC)
 Large nos. of simplify instruction
 Low code density
 Simplify hardware compilation tools
 MIPS, ARM, SPARC, powerPC

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RISC vs. CISC

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Instruction Operands Based ISA
Classification

 Instruction in assembly language can have


multiple operands
 Memory-memory (VAX and PDP)
 Register-memory (Motorola 68K and X86)
 Register-register (ARM and MIPS)

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Memory Interface Based Architecture
Classification

 Von Neumann architecture


 Used common bus for data and code memory
 Harvard architecture
 Use separate buses for code and data memories
 Allow simultaneously access

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Reading Assignment

 Article 1.7 software system and development


tools

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