 The Architecture .

 The Memory Endurance .

 Packaging .
 Single Cycle Execution Instruction(orders in assembly
language) : It executes a single order every single
pulse(doesn’t exceed 131 order) .
 Mega Instruction Per Second(Atmel) : It executes 16M
order in second when operated on 16MHz .
 One Chip 2-Cycle Multiplier .
 Self Programmable Flash Memory(32KB) .
 EPROM(512 Byte).
 SRAM(1KB) .
 True Read While Write Operation .
 Programming Locks .
 DIP

 SMD