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LAB 09: LATCHES & FLIP FLOP CIRCUITS

Lab Instructor..

En g r. Sye d Z i a U d d i n
M. En g g(In d ustr ial Ele ct ro nics)
D e p ar t men t o f Ele ct r ical En g i n eer in g
B ah r ia U n iversity K arach i
DLD BS CS FALL 2017 1
LATCH
Latch is a temporary storage device , independent of clock signal.

DLD BS CS FALL 2017 2


FLIP FLOP
Flip Flop is a Memory , 1 flip flop stores 1 Bit…!
Flip Flop is clock dependent !

TYPES :

SR FLIP FLOP


JK FLIP FLOP
D FLIP FLOP
T FLIP FLOP

DLD BS CS FALL 2017 3


SR FLIP FLOP

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DLD BS CS FALL 2017 5
DLD BS CS FALL 2017 6
VCC
X1
5V

2.5 V

J1

U2
Key = Space SET X2
1 S Q
4
VCC
CLK 2.5 V
2 R ~Q
J2 RESET 5
6 SR_FF_POSSR
0
Key = Space
J3

3
Key = Space
V1
1kHz
5V
0

DLD BS CS FALL 2017 7


D FLIP FLOP

DLD BS CS FALL 2017 8


DLD BS CS FALL 2017 9
JK FLIP FLOP

DLD BS CS FALL 2017 10


DLD BS CS FALL 2017 11
T FLIP FLOP

DLD BS CS FALL 2017 12


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