Introduction to VLSI Design

 Instructor: Steven P. Levitan levitan@ee.pitt.edu

 TA: Jeremiah Cessna jecst40@pitt.edu
 Book: Digital Integrated Circuits: A Design
Perspective; Jan Rabaey
 Lab Notes: at Copycat
 http://kona.ee.pitt.edu/steve/EE1192
 http://infopad.EECS.Berkeley.EDU/~icdesign/

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

Digital Integrated Circuits
A Design Perspective

Jan M. Rabaey
 Course Outline (approximate)
– Introduction and Motivation
– The VLSI Design Process
– Details of the MOS Transistor
– Device Fabrication
– Design Rules
– CMOS circuits
– VLSI Structures
– System Timing
– Real Circuits and Performance

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 Reference Books

– Principles of CMOS VLSI Design: Neil Weste

and Kamran Eshraghian
– CMOS: Baker, Li, Boyce
– Application Specific Integrated Circuits: Smith
– The Design and Analysis of VLSI
– Circuits: Lance Glasser and Daniel Dobberpuhl
– Introduction to VLSI Systems: Carver Mead &
Lynn Conway
– NewsGroups: comp.lsi, comp.lsi.cad

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 Software
– Magic
 Unix Based
 Interactive Design Rule Checking
 Circuit Extraction
 Supported Technology files

– Spice
 Well known and disliked
 Spice 3 allows user models
 Good support/documentation
 Interface with Magic extraction

– Irsim
 Switch / Switched - Resistor level
 Fast functional validation
 Good interface with Magic

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 The First Computer

The Babbage
Difference Engine
(1832)
25,000 parts
cost: £17,470

Digital Integrated Circuits Introduction © Prentice Hall 1995

 ENIAC - The first electronic computer
(1946)

Digital Integrated Circuits Introduction © Prentice Hall 1995

 Evolution in Complexity

Digital Integrated Circuits Introduction © Prentice Hall 1995

 What is “CMOS VLSI”?
– MOS = Metal Oxide Semiconductor (This used
to mean a Metal gate over Oxide insulation)

– Now we use polycrystalline silicon which is

deposited on the surface of the chip as a gate.
We call this “poly” or just “red stuff” to
distinguish it from the body of the chip, the
substrate, which is a single crystal of silicon.

– We do use metal (aluminum) for interconnection

wires on the surface of the chip.

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 CMOS:Complementary MOS

– Means we are using both N-channel and P-

channel type enhancement mode Field Effect
Transistors (FETs).
– Field Effect- NO current from the controlling
electrode into the output
 FET is a voltage controlled current device
 BJT is a current controlled current device
– N/P Channel - doping of the substrate for
increased carriers (electrons or holes)

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 N-Channel Enhancement
mode MOS FET
– Four Terminal Device - substrate bias

–The “self aligned gate” - key to CMOS

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 VLSI:Very Large Scale
Integration
 Integration: Integrated Circuits
» multiple devices on one substrate
 How large is Very Large?
– SSI (small scale integration)
 7400 series, 10-100 transistors
– MSI (medium scale)
 74000 series 100-1000
– LSI 1,000-10,000 transistors
– VLSI > 10,000 transistors
– ULSI/SLSI (some disagreement)
Introduction to VLSI Design Introduction © Steven P. Levitan 1998
 Intel 4004 Micro-Processor

Digital Integrated Circuits Introduction © Prentice Hall 1995

 Evolution in Transistor Count

Digital Integrated Circuits Introduction © Prentice Hall 1995

 Scale Example

 Consider a chip size of 20mm X 20mm

 Consider a transistor size of 2um X 2um
» With area for wires, etc.
 1x108 transistors / chip
 Or - plot at 1 transistor : 1 mm
– 1 chip : 20 meter x 20 meter plot

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 Intel Pentium (II) microprocessor

Digital Integrated Circuits Introduction © Prentice Hall 1995

 VLSI Design
– But the real issue is that VLSI is about
designing systems on chips.
– The designs are complex, and we need to use
structured design techniques and sophisticated
design tools to manage the complexity of the
design.
– We also accept the fact that any technology we
learn the details of will be out of date soon.
– We are trying to develop and use techniques
that will transcend the technology, but still
respect it.

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 The Process of VLSI Design:
Consists of many different representations/Abstractions
of the system (chip) that is being designed.
– System Level Design
– Architecture / Algorithm Level Design
– Digital System Level Design
– Logical Level Design
– Electrical Level Design
– Layout Level Design
– Semiconductor Level Design (possibly more)
Each abstraction/view is itself a Design Hierarchy of
refinements which decompose the design.
Introduction to VLSI Design Introduction © Steven P. Levitan 1998
 Design Abstraction Levels

SYSTEM

MODULE
+

GATE

CIRCUIT

DEVICE
G
S D
n+ n+

Digital Integrated Circuits Introduction © Prentice Hall 1995

 Help from Computer Aided
Design tools

 Tools  Experts
» Editors » Logic design
» Simulators » Electronic/circuit
» Libraries design
» Module Synthesis » Device physics
» Place/Route » Artwork
» Chip Assemblers » Applications - system
» Silicon Compilers design
» Architectures

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 New Design Methodologies
 Methodologies which are based on:
» System Level Abstractions v.s. Device
Characteristic Abstractions
– Logic structures and circuitry change slowly
over time
 trade-offs do change, but the choices do not
» Scalable Designs
– Layout techniques also change slowly.
 But the minimum feature size steadily decreases with
time (also Voltage, Die Size, etc.)

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 Design Approaches
– Custom
 full control of design
 best results, slowest design time.
– Semi-custom (std cell)
 use Cell libraries from vendor
 cad tools, faster design time
– Gate Array
 fastest design time
 worst speed/power/density
 best low volume (worst high volume)
– EPLA/EPLD - FPGA - electrically
programmable (in the field) -
Introduction to VLSI Design Introduction © Steven P. Levitan 1998
 Close up of Intel Chip?

Time Magazine, July 1998

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 Evolution in Speed/Performance

Digital Integrated Circuits Introduction © Prentice Hall 1995

 Technologies
– Bipolar (BJT)
 TTL, Schottky
 ECL
 I^2 L
– Dual Junction, current controlled devices
 MOS (FET unipolar)
» NMOS, PMOS
» CMOS <== our course
– Single Junction voltage controlled devices
 GaAs (typically JFET’s)
 OEIC’s - MQW’s, Integrated Lasers,?

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 Silicon in 2010
Density AccessTime
(Gbits/cm2) (ns)
Die Area: 2.5x2.5 cm
DRAM 8.5 10
Voltage: 0.6 V
DRAM (Logic) 2.5 10
Technology: 0.07 m
SRAM (Cache) 0.3 1.5

Density Max. Ave. Power Clock Rate

(Mgates/cm2) (W /cm2) (GHz)
Custom 25 54 3
Std. Cell 10 27 1.5
Gate Array 5 18 1
Single-Mask GA 2.5 12.5 0.7
FPGA 0.4 4.5 0.25
Digital Integrated Circuits Introduction © Prentice Hall 1995
 SIA -National Technology
Roadmap for Semiconductors

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 SIA -National Technology
Roadmap for Semiconductors

8 inch 18 inch

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 SIA -National Technology
Roadmap for Semiconductors

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 SIA -National Technology
Roadmap for Semiconductors

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 SIA -National Technology
Roadmap for Semiconductors

Introduction to VLSI Design Introduction © Steven P. Levitan 1998

 SIA -National Technology
Roadmap for Semiconductors

Introduction to VLSI Design Introduction © Steven P. Levitan 1998