DIGITAL

COMMUNICATION
 WHAT IS ERROR?
Error is a condition when the

Output Information ≠ Input information

During transmission, digital signals can suffer from noise that can introduce errors in the binary
bits travelling from one system to other. That means a 0 bit may change to 1 or a 1 bit may
change to 0.
 ERROR DETECTION AND CORRECTION

ERROR DETECTION
Error detection is the detection of errors
caused by noise or other impairments during
transmission from the transmitter to the
receiver.
ERROR CORRECTION
Error correction is the detection of errors
and reconstruction of the original, error-
free data.
 TYPES OF ERROR
Single bit error
Multi bits error
Burst bits error

00 11 00 11 00

00 11 1 11 00 00 11 1 11 1 0 0 1 0 0

Single Bit Error Multi bits error

Burst Bits error
HAMMING CODES
DEFINITION: HAMMING CODES

“Hamming code is a set of error-correction codes that can be used to detect and
correct bit errors that can occur when computer data is moved or stored.”
 OVERVIEW
Add Parity Bits

Find Position and value of Parity

Check for Error

If there is no Error then terminate the process

If Error occur then detect and Correct it

REPRESENTATION:

Hamming codes are represented in two forms:

 Systematic form.

 Non systematic form.

PARITY CHECK
PARIITY CHECK
Even.
A parity value of zero indicates that there is an even number of ones.
Odd.
Parity value of one indicates that there is an odd number of ones in the data
PRACTICAL APPLICATIONS OF
HAMMING CODES:
In computer memory.
DRAM memory chips.
Satellite communication system.
Used to check error.
Correct ASCII codes.
In Wireless communication.
LIMITATIONS:
It can only detect and correct errors when the error rate is low.
Detect two bit error but not correct it.
Redundant bits are also sent with the data so it needs extra bandwidth to send the
data.
Correct one bit error without detection of uncorrected errors.
Simple parity code can detect only an odd number of bits in error.
 LIMITATION OF HAMMING CODE
Hamming code only can solve up to single bit.

Single-bit detection and correction code, if multiple bits are errored then the
errors are detected but the resultant could cause another bit that is correct to
be changed, causing the data to be further errored.

Transmission bandwidth requirement is high.

CYCLIC CODES
WHAT THEY ARE?
A Cyclic Code is a linear block code having the property that a cyclic shift (rotation)
of any codeword
yields another codeword.

Due to this additional property, the encoding and decoding processes can be
implemented more efficiently using a feedback shift register.
CONDITIONS
There are two conditions for the Cyclic Codes :

1. Linearity
 Given Code Word should be following the property of Linearity.

2. Cyclic Shift
 The Code Word should be following the Cyclic shift.
TYPES OF CODE WORDS
There are two types of code words:

1. Systematic Code Word

 In which the message code is before the Parity Code or Parity Code is before the Message
Code.

2. Non-Systematic Code Word

 If we do not know the arrangement of Parity code and Message Code, then it is known as “Non-
Systematic Code Word”.
SYSTEMATIC CODEWORD
The codeword in which the message bits and parity
bits can be separated and identified , it is called
systematic codeword.

A systematic codeword consists of

• Message M
•Parity check C→ M:C

For example in (7,4),

first four bits are message bits

and last three bits are parity bits
FORMULA FOR GENERATING
SYSTEMATIC CODE WORD

X(x)=xn-k.M(x)+P(x)
Where P(x)
Rem. xn-k.M(x)/g(x)
NON-SYSTEMATIC CODEWORD

The codeword in which the message bits and parity

bits cannot be separated and identified, it is called
Non-systematic codeword.

Formula for generating Non-Systematic

Codeword:

X(x)=M(x).g(x)
ADVANTAGES OF CYCLIC CODES
•Good performance in detecting single bit and double bit error and odd number
errors
•Can be easily implemented on both hardware and soft were
•Its decoding is reasonably simple as compare to others
•Minimal distance h(c) is easy to compute if c is linear code
•Cannot be tapped by unwanted receiver.
DISADVANTAGES:
•Heavy restriction for cyclic codes generations are required
•Linearity
• cyclic shift
•Non systematic codes
APPLICATIONS:
The most common cyclic codes application is Steganography.
Steganography is the hiding of a secret message within an ordinary message and the
extraction of it at its destination.
Example:
LINEAR BLOCK CODES
INTRODUCTION
The purpose of linear block coding is to enable the receiver to detect or even correct
the errors by introducing
some redundancies in to the data to be transmitted.
There are basically two mechanisms for adding
redundancy:
1. Block coding
2. Convolutional coding
CHANNEL CODING
The purpose of channel coding theory is to find codes which transmit quickly, contain
many valid code words and can correct or at least detect many errors
Channel Encoding makes a signal compactable for Tx before is transmission. e.g
If signal is analog and Channel is digital.
Linear codes
Algebraic coding theory is basically divided into two major types of codes:
Linear block codes
Convolutional codes
LINEAR BLOCK CODES
Linear block codes have the property of linearity, i.e. the sum of any two code words
is also a code word
There are many types of linear block codes, such as
Cyclic codes (e.g., Hamming codes)
Repetition codes
Parity codes
Polynomial codes (e.g., BCH codes)
Reed–Solomon codes
ERROR DETECTION CODE
 TYPES OF ERRORS
Single Bit Error
 Only one bit in data unit has changed

Multiple Bit Error

 Two or more bits are changed at receiving site
 Often called as burst error
 ERROR DETECTION MECHANISM
Redundant bits are used by the codes to detect error
Whenever data is corrupted, receiver asks for retransmission

Parity Check Mechanism

Parity is generated at sender’s site
Parity is detected at receiver site

Two Parity Check Methods

 Simple Parity(Even/Odd) ------- for one bit error detection
 Rectangular Parity ---------------- for two or more bit errors
SIMPLE PARITY CHECK CODES
A single parity bit(1 or 0) is added to the left most of original data stream
Even Parity Code
 If original data has even no. of 1s , add parity bit 0
 If original data has odd no. of 1s, add parity bit 1 (to make no. of 1s even)

Odd Parity Code

 If original data has even no. of 1s , add parity bit 1 (to make no. of 1s odd)
 If original data has odd no. of 1s, add parity bit 0
PARITY DETECTION
At receiving site

 Receiver counts No. of 1s in received bit stream

 If even parity is used, No. of 1s should be even
If received bit stream has odd no. of 1s, error has occurred
and receiver asks for retransmission

 If odd parity is used, No. of 1s should be odd

If received bit stream has even no. of 1s, error has occurred
and receiver asks for retransmission
INTRODUCTION:
CONVOLUTIONAL ENCODER
Convolutional encoder is a finite state machine (FSM),processing
information bits in a serial manner.
 Serial Register
 modulo-two addition.

Every time the active edge of the clock occurs, the input to
the flip-flop is clocked through to the output, and thus the
data are shifted over one stage.
Depends on the present As well as previous inputs(Stored in SR).
 PARAMETERS OF A CONVOLUTIONAL ENCODER
K is the number of bits that form input to encoder
N is the number of bits in the codeword output from encoder
m = number of memory registers
Code Rate: The quantity k/n is called as code rate. It is a measure of
the efficiency of the code.
Constraint Length: The quantity L(or K) is called the constraint length of
the code. It represents the number of bits in the encoder memory that
affect the generation of the n output bits. It is defined by
 Constraint Length, L = k (m-1)
 ENCODER REPRESENTATIONS
The encoder can be represented in several different but equivalent
ways. They are:
I.State Diagram Representation
II. Tree Diagram Representation
III. Trellis Diagram Representation
 I. STATE DIAGRAM REPRESENTATION
In the state diagram, the state information of the encoder
is shown in the circles. Each new input information bit causes
a transition from one state to another.
Contents of the rightmost (K-1) shift register stages define
the states of the encoder. The transition of an encoder from
one state to another, as caused by input bits, is depicted in the
state diagram.
 II. TREE DIAGRAM REPRESENTATION
The tree diagram representation shows all possible information
and encoded sequences for the convolutional encoder.
In the tree diagram, a solid line represents input information bit
0 and a dashed line represents input information bit 1.
The corresponding output encoded bits are shown on the
branches of the tree.
An input information sequence defines a specific path through
the tree diagram from left to right.
 TRELLIS DIAGRAM REPRESENTATION
The trellis diagram is basically a redrawing of the state diagram. It shows
all possible state transitions at each time
step.
The trellis diagram is drawn by lining up all the possible states (2L) in the
vertical axis. Then we connect each state to the next state by the allowable
codeword’s for that state.
There are only two choices possible at each state. These are determined by
the arrival of either a 0 or a 1 bit.
The arrows show the input bit and the output bits are shown in parentheses.
The arrows going upwards represent a 0 bit and going downwards
represent a 1 bit.
 TRELLIS DIAGRAM CONSTRUCTION STEPS
It starts from scratch (all 0’s in the SR, i.e., state a) and makes transitions
corresponding to each input data digit.
These transitions are denoted by a solid line for the next data digit 0 and
by a dashed line for the next data digit 1.
Thus when the first input digit is 0, the encoder output is 00 (solid line)
When the input digit is 1, the encoder output is 11(dashed line).
We continue this way for the second input digit and so on as depicted in Fig
that follows.
 CONVOLUTION ENCODING
1)Connection Representation

In each clock cycle the Bits

contained in each Register stage
are right Shifted to the following
Stage.
The two outputs are sampled to
Generate two output bits for
Each input bit.
EXAMPLE:

Let an Example
IMPULSE RESPONSE
STATE
DIAGRAM
Encoder is a linear sequential circuit, its behavior
can be described by a state diagram
TREE DIAGRAM

It adds dimension of time to the state diagram.

THE TRELLIS DIAGRAM

In this, state diagram expand in time to display

state transition of convolutional encoder in time.
ENCODER
TRELLIS
DIAGRAM
With time transitions
VITERBI CONVOLUTIONAL
DECODING ALGORITHM
It reduces the computational load by taking advantage of special structure in the
code of trellis.
The Algorithm involves calculating a measure of similarity or distance between the
received signal at t and all the trellis path entering each state at time t.
When two paths enter same state, the one having the best matric is chosen, this path
is called the surviving path.
Making decisions by eliminating the least likely paths, reduces the decoding
complexity.
VITERBI ALGORITHM

Let take a Example

PROPERTY OF CONVOLUTION CODING
Systematic convolution coding
In systematic code, message information can be seen and directly extracted
from the encoded information.
In systematic code, there is no need to have inverse transfer function decoder to
obtain the input sequence, because this is directly read from code sequence.
TURBO ENCODING
CONCATENATED CODING
A single error correction code does not always provide enough error correction
protection with reasonable complexity.
Solution: Concatenation two (or more) code
 This creates a much powerful code.

Serial concatenation (Forney, 1966)

NEED FOR BETTER CODES
The design of a channel code is always a trade-off between
energy efficiency and bandwidth efficiency.
Low rate codes having more redundant bits can usually correct
more errors.
The decoding complexity of the code also grows exponentially
with code length.
SHANNON CAPACITY
Shannon Limit
Gives theoretical maximum bit rate that can be transmitted with
small BER over channel affected by AWGN
For the last six decades, coding theorists have been looking for
practical codes capable of closely approaching the Shannon limit.
maximum rate at which information can be transmitted over a
communications channel of a specified bandwidth in the presence
of noise
CHARACTERISTIC FEATURES OF TURBO CODES
Parallel Concatenated Coding
Recursive Systematic Encoders
Use of Interleavers
Iterative decoding mechanism
TURBO ENCODER
Turbo Code
 Formed from the parallel concatenation of two encoders (normally
identical)
 Separated by an Interleaver
 Code is in systematic form
 Encoders are Recursive Systematic Convolutional Codes (RSC)
 RSC codes
 Systematic Feedback Encoders
 Gives much better performance than feedforward encoders
 Interleaver
 Reads the bits in a pseudo-random order
TURBO ENCODER
PURPOSE OF INTERLEAVER
To randomize bursty error patterns
so that it can be correctly decoded
Because only the ordering of the bits changed by the interleaver,
the sequence that enters the second RSC encoder has the same
weight as the sequence x that enters the first encoder.
CONCATENATED INTERLEAVER AND DE-
INTERLEAVER
INTERLEAVER DESIGN (CONTD.)
Turbo encoder consists of interleaver unit which can be used to
increase the BER performance by varying the interleaving size.
In turbo code, interleaver unit is a random block that is used to
rearrange the input data bits with no repetition.
INTERLEAVER DESIGN (CONTD.)
Interleaver unit is used in both encoder and decoder part.
Encoder side
 Generates a long block of data
Decoder side
 Helps to correct the error
 To correct remaining errors
 Pass the output of the first decoder to the second decoder after
interleaving it again
TURBO DECODER
Consist of two decoders that work iteratively
Output of first decoder feeds into the second decoder
To form a turbo decoding iteration
TURBO DECODER
APPLICATION

• Wireless multimedia
– Data: use large frame sizes
• Low BER, but long latency
– Voice: use small frame sizes
• Short latency, but higher BER

• Combined equalization and error correction decoding.

• Combined multiuser detection and error correction

decoding.
PROSAND
CONS
• Pros • Cons
– Long latency.
Remarkable power efficiency
in AWGN and flat-fading
– Poor performance at
channels for moderately low
BER. very low BER.

– Because turbo codes

Deign tradeoffs suitable for
delivery of multimedia operate at very low
services. SNR, channel
estimation and
tracking is a critical
issue.
TYPES OF ERROR CONTROL
Automatic Retransmission
Forward Error Correction
Query
It requires Transmitter to This technique employs
resend the portions of the special codes that allow the
exchange in which errors receiver to detect and
have been detected correct errors without
referring to transmitter