• In the example given under ports section, the display delay is implemented using a delay generator loop. • The delay generation can be easily implemented using a timer and the required operations following the delay can be implemented in the timer interrupt handling routine. Initial value calculation for Timer registers • In Mode 1 acts as 16-bit register • Starts from 0(0000H) to 65535(FFFFH) and generates timer interrupts when rolls over from 65535(FFFFH) to 0(0000H). • If system clock is 12 MHz, the timer interrupt asserted after every 65536 microseconds (0.0655 seconds), if the counter started with an initial count 00H. For generating a delay of 1 second, the timer interrupt should generated multiple times. • If one timer interrupt generates 50000 microseconds, 100 such interrupts are required to generate a delay of 5 seconds • for generating a delay of 50000 microseconds , timer should be loaded with the 65536-50000=15536(3CB0H). ORG 0000H JMP 0050H ORL IE,#10000010B ORG 0003H RETI ANL IE,#11100010B ORG 000BH MOV SP, #08H JMP timer0_intr MOV R7, #00H ORG 0013H CLR TR0 RETI MOV TL0, #0B8H ORG 001BH RETI MOV TH0, #3CH ORG 0023 MOV R0, #100 RETI MOV TMOD,#01H ORG 0050H SETB TR0 MOV P2, #0FF JMP $ timer0_intr: DJNZ R0, return INC R7 MOV A, R7 CPL A MOV P2, A MOV R0, #100 return: MOV TL0, #0B8H MOV TH0, #3CH RETI END