Arithmatic Circuit

Iik Muhamad Malik Matin, S.Kom

Electrical Engineering
Integer Representation
Range of integers
Taxonomy of Integers
Range of Unsigned Integers

# of Bits Range
--------- -------------------------------------
8 0 255
16 0 65,535
Example
Ex..
Store 7 in an 8-bit memory location.

Solution
First change the number to binary 111. Add five 0s to make a total of N
(8) bits, 00000111. The number is stored in the memory location.
Example
Ex..
Store 258 in a 16-bit memory location.

Solution
First change the number to binary 100000010. Add seven 0s to make a
total of N (16) bits, 0000000100000010. The number is stored in the
memory location
Example
Ex..
Interpret 00101011 in decimal if the number was stored as an unsigned
integer.

Solution
00101011 the number in decimal is 43
Range of Sign and Magnitude Integers

# of Bits Range
---------- -------------------------------------------------------
8 -127 -0 +0 +127
16 -32767 -0 +0 +32767
32 -2,147,483,647 -0 +0 +2,147,483,647
Sign-and-Magnitude Representation
Definition
In sign-and-magnitude representation, the leftmost
bit defines the sign of the number. If it is 0, the
number is positive. If it is 1, the number is negative
Sign-and-Magnitude Representation
There are two representation in sign-and-
magnitude
representation: positive and negative.

In an 8-bit allocation:
+0  00000000
-0  10000000
Example
Ex..
Store –258 in a 16-bit memory location using sign-and-magnitude
representation.

Solution
First change the number to binary 100000010. Add six 0s to make a total of N-
1 (15) bits, 000000100000010. Add an extra 1 because the number is
negative. The result is:

1000000100000010
Exampleof storing sign-and-magnitude
integers in two computers

Decimal 8-bit allocation 16-bit allocation

------------ ------------ ------------------------------
+7 00000111 0000000000000111
-124 11111100 1000000001111100
+258 overflow 0000000100000010
-24,760 overflow 1110000010111000
Example
Ex..
Interpret 10111011 in decimal if the number was stored as a sign-and-
magnitude integer.

Solution
Ignoring the leftmost bit, the remaining bits are 0111011. This number
in decimal is 59. The leftmost bit is 1, so the number is –59.
One’s Complement

•If the sign is positive (0), no more action

is needed;
•If the sign is negative (1), every bit is
complemented.
Range of one’s complement integers

# of Bits Range
--------- -------------------------------------------------------
8 -127 -0 +0 +127
16 -32767 -0 +0 +32767
32 -2,147,483,647 -0 +0 +2,147,483,647
One’s Complement

In one’s complement representation,

the leftmost bit defines the sign of the number.
If it is 0, the number is positive.If it is 1, the
number is negative.
One’s Complement

change each bit 1 to 0 and 0 to 1

Example
Ex..

0 0 0 1 1 0 0 1 = +25

1 1 1 0 0 1 1 0 = hasil one’s complement

Two’s Complement (using One’s Complement)

In two’s complement representation, the

results of one's complement are added with
binary 1
.
Two’s Complement (using One’s Complement)
Ex..
specify a negative value of +25!!
0 0 0 1 1 0 0 1 = +25

1 1 1 0 0 1 1 0 = hasil one’s complement

1+
1 1 1 0 0 1 1 1 = -25
Two’s Complement (using One’s Complement)
Ex..
specify a negative value of +28!!
0 0 0 1 1 1 0 0 = +28

1 1 1 0 0 0 1 1 = hasil one’s complement

1+
1 1 1 0 0 1 0 0 = -28
Two’s Complement (without One’s
Complement)
•copy the bits from right to left until you find
the first 1 bit
•then change bit 1 to 0 and 0 to 1
Two’s Complement (using One’s Complement)
Ex..
specify a negative value of +25!!
0 0 0 1 1 0 0 1 = +25

1 1 1 0 0 1 1 1 = -25
Two’s Complement (without One’s
Complement)
Ex..
specify a negative value of +28!!
0 0 0 1 1 1 0 0 = +28

1 1 1 0 0 1 0 0 = -28
Summation of Two’s Complement
Ex..
Count 5 + 2…
Carryout
+5 0 1 0 1
+2 0 0 1 0+
+7 0 1 1 1
Summation of Two’s Complement
Ex..
Count 5 + (-2)…
Carryout 1 1
+5 0 1 0 1
-2 1 1 1 0+
+3 1 0 0 1 1
Summation of Two’s Complement
Ex..
Count (-5) + 2…
Carryout
-5 1 0 1 1
+2 0 0 1 0+
-3 1 1 0 1
Summation of Two’s Complement
Ex..
Count (-5) + (-2)…
Carryout 1 1 1
-5 1 0 1 1
-2 1 1 1 0+
-7 1 0 0 1
Exercises
Store in 8 bit allocation Data and count exercises below…
a. 10+(-5)

b. (-15)+ 4

c. (-13)+(-2)

d. 8+(-14)
Exercises
Store in 8 bit allocation Data and count exercises below…
a. 12+(-5)

b. (-15)+ 4

c. (-9)+(-1)

d. 11+(-4)
Combinational Circuits
Introduction
• Logic circuits for digital systems may be either combinational or
sequential.
• A combinational circuit consists of logic gates whose output anytime
are determined from only the present combination input
Combinational Circuit
• n of input values
• 2 possible combination
• Spesific function
• Adders
• Substractor m output
n input Combinational
• Comparator variables Logic Circuit variables
• Decoder
• Encoder
• Multiplexer
• Demux
Adder
Penjumlah atau Adder adalah komponen elektronika digital yang
dipakai untuk menjumlahkan dua buah angka dalam sistem bilangan
biner. Dalam komputer dan mikroprosesor, Adder biasanya berada di
bagian ALU (Arithmetic Logic Unit)
 1-Bit Half Adder
Half adder
 0 + 0 = 0 ; 0 + 1 = 1 ; 1 + 0 = 1 ; 1 + 1 = (10)2
 two input variables: x, y

 two output variables: C (carry), S (sum)

 truth table

S = x'y+xy'=xy= (x+y)(x'+y')
C = xy= (x'+y')'
S' = xy+x'y'
S = (C+x'y')'
Logic Diagram of 1-Bit
Half Adder
 1-Bit Full Adder
Full-Adder
 The arithmetic sum of three
input bits
 three input bits
 x, y: two significant bits
 z: the carry bit from the
previous lower significant bit
 Two output bits: C, S

Sum Carry

Lan-Da Van DCD-

Logic Diagram of 1-Bit
Full Adder
 Logic Diagram of 1-Bit
Full Adder
 S = x'y'z+x'yz'+ xy'z'+xyz
= x’(yz) +x(yz)’ = xyz
 C = xy + xz + yz

= xy + xyz + xy’z + xyz + x’yz

= xy + z (xy + xy)
= xy + z (xy)
 4-Bit Full Adder
Binary adder
Subtractors
Substractor is an electronic Circuit for calculating the
difference between two binary numbers which
provides the difference and borroe as output
Subtractors
• Half Subtractor
• Full Subtractor
Half Subtractor

A0 B0 D0 C 1 A0
D0
0 0 0 0 B0
0 1 1 1
1 0 1 0
1 1 0 0
C1

0
-1
1
Full Subtractor
Ci Ai Bi Di Ci+1 AiBi
Ci 00 01 11 10
0 0 0 0 0
0 0 1 1 1 0 1 1
0 1 0 1 0
0 1 1 0 0
1 1 1
1 0 0 1 1
1 0 1 0 1
1
1
1
1
0
1
0
1
0
1
Di
Di = Ci $ (Ai $ Bi)

Same as Si in full adder

Full Subtractor
AiBi
Ci Ai Bi Di Ci+1 Ci 00 01 11 10

0 0 0 0 0 0 1
0 0 1 1 1
0 1 0 1 0
0 1 1 0 0 1 1 1 1
1 0 0 1 1
1 0 1 0 1
1 1 0 0 0
Ci+1
1 1 1 1 1
Full Subtractor
Di = Ci $ (Ai $ Bi)

Ci+1 = !Ai & Bi # Ci & !(Ai $ Bi)

Ci

Ai Di
Bi

C i+1
half subtractor
half subtractor
Note for Half Exam
• Point B
• All close ex. Cheat sheet
• Cheat Sheet
• A4
• Write feel free

• Material
• Mccluskey
• Arithmatic Circuit
• Combinational Circuit
• NO PLAGIARISM