Design an 8051 based data acquisition system for

interfacing ADC, ADC0801.

• Specifications
 Use AT89s8252 (flash MC with In System Programming(ISP)
 Use 12 MHz freq.
 Use on chip program memory to storing program instructions
 The data lines of ADC is interfaced to port-2 of the MC. The control
signals (RD\, WR\, CS\) to the ADC supplied through port-3 pins of
MC.
 Voltage range for conversion is 0-5v, generated using
potentiometer, the ADC asserts its interrupt line to interrupt the
MC when AD conversion is over and data is available at ADC data
port.
 The MC reads the data on receiving the interrupt and stores in
memory.
 Only the most recent 16 samples are stored in the MC memory
• P3.3- connected CS\ of ADC
• P3.0- connected RD\ of ADC
• P3.1- connected to WR\ of ADC
• P3.2(12-INT0)- CONNECTED TO INTR\ OF ADC
• Fclk=1/1.1RC
• CS\ is used activate ADC
• WR\ should be asserted low for start of conversion, the data
conversion begins when wr\ signal makes transion from
asserted state to high
• The adc asserts the line INTR\ on completion of the
conversion. The signal generates an interrupt at the processor.
• The converted digital data is available on bus of the adc from
the moment the INTR\ line is asserted low.
• The INTR\ signal is reset when RD\ signal is asserted low by
the processor
ORG 0000H
JMP 0050H
ORG 0003H
CALL EXTERNAL_INT0
RETI
ORG 0013H
RETI
ORG 001BH
RETI
ORG 0023
RETI
ORG 0050H
MOV P2, #0FFH ; Configure p2 as i/p port
MOV SP, #08H
CLR P3.3 ; CS\=0
CLR P3.0 ; RD\=0
SETB P3.3 ; DE-SELECT ADC
MOV R0, #16 ; Set the counter for 16 samples
MOV R1, #20 ; STARTING ADDRS
CLR IT0 ; SET EXT.INT 0 AS LOW LEVEL TRIGGERED
MOV IE, #10000001b ;enable only ext.intr-0
CLR P3.3 ;SELECT ADC
CLR P3.1 ;TRIGGER ADC CONVERSION WR\=0
NOP
NOP
SETB P3.1 ;TOGGLE FROM 0 TO 1 TO INITIATE CONVERSION WR\=1
JMP $ ; LOOP FOREVER
 Routine for handling interrupt
EXTERNAL_INT0:
MOV @R1,P2
CLR P3.0 ; ASSERT RD\ SIGNAL TO CLEAR INTR\ ADC SIGNAL LINE
NOP
NOP
SETB P3.0
SETB P3.3 ; DE-SELECT ADC
DJNZ R0, RETURN
MOV R1, #20
MOV R0, #16
RETURN: INC R1
CLR IE0
CLR P3.3
CLR P3.1
NOP
NOP
SETB P3.1
RET