EMBEDDED SYSTEM

3 STAGE PIPELINE WITH BRANCH SPECULATION IN CORTEX M3

by Aryan Gamit – P19VL021
Content

 What is pipelining
 3 stage pipelining
 Hazards in pipelining
 Control hazards in pipelining
 Branch speculation
 Dynamic Branch Speculation
pipelining

 instruction pipelining is a technique for implementing

instruction-level parallelism within a single processor.
 Instruction pipelining is a technique used in the design of
modern microprocessors, microcontrollers and CPUs to
increase their instruction throughput (the number
of instructions that can be executed in a unit of time).
 Can design faster ALUs
 Pipelined CPUs generally work at a higher clock frequency
than the RAM clock frequency, (as of 2008 technologies, RAMs
work at a low frequencies compared to CPUs frequencies)
increasing computers overall performance.
pipelining

CYCLE 1 2 3 4 5 6 7 8 9

INSTRUCTION_1 FETCH DECODE EXECUTE

INSTRUCTION_2 FETCH DECODE EXECUTE

INSTRUCTION_3 FETCH DECODE EXECUTE

WITHOUT PIPELINING1/3 Instruction per cycle

CYCLE 1 2 3 4 5

INSTRUCTION_1 FETCH DECODE EXECUTE

INSTRUCTION_2 FETCH DECODE EXECUTE

INSTRUCTION_3 FETCH DECODE EXECUTE

WITH PIPELINING3/5 Instruction per cycle

3 stage pipeline

 Fetch:
 Get the next instruction from memory
 Increment Program Counter value by 4
 Decode:
 Figure out what the instruction says to do
 Get values from the named registers
 Execute:
 the operands are read from the register bank, shifted, combined in the
ALU and the result written back
Hazards in pipelining

 The model of sequential execution assumes that each

instruction completes before the next one begins; this
assumption is not true on a pipelined processor. A situation
where the expected result is problematic is known as a hazard.
 Structural: A structural hazard refers to a situation in which a
required resource is not available (or is busy) for executing an
instruction.
 Data: A data hazard refers to a situation in which there exists a
data dependency (operand conflict) with a prior instruction.
 Control: A control hazard refers to a situation in which an
instruction, such as branch, causes a change in the program flow.
Control hazard in pipelining

R1!=R2

R1=R2
Branch Speculation

 Speculation : the act of guessing possible answers to

a question without having enough information to be certain
 In branch speculation we will predict either the branch will be
taken or not and according to that assumption we will fetch
next instruction in pipeline
Dynamic Branch Speculation

2-bit prediction method

MOV R4,#0
MOV R5,#9
LOOP1: ADD R4,#1
LOOP2: MOV R1,#0
MOV R2,#9
ADD R1,#1
CMP R1,R2
BLT LOOP2
CMP R4,R5
BLT LOOP1
Thank You