Unit 4: Input-Output

Points Covered
• I/O Addressing Addressing I/O ports

Instructions that
• I/O Instructions cause I/O
operations

• Protection and I/O Protection

 I/O Addressing
• Two ways to perform input/output
– By means of a separate I/O address space
– By means of memory-mapped I/O
 I/O Address Space
• The 80386 provides a separate I/O address space,
distinct from physical memory
• The I/O address space consists of 216 (64K)
individually addressable 8-bit ports; any two
consecutive 8-bit ports can be treated as a 16-bit
port; and four consecutive 8-bit ports can be
treated as a 32-bit port.
• Thus, the I/O address space can accommodate up
to 64K 8-bit ports, up to 32K 16-bit ports, or up to
16K 32-bit ports.
• The address of the port can be specified in
two ways
– immediate byte constant
• 256 8-bit ports numbered 0 through 255.
• 128 16-bit ports numbered 0, 2, 4, ... , 252, 254.
• 64 32-bit ports numbered 0, 4, 8, ... , 248, 252.
– Using a value in DX
• 8-bit ports numbered 0 through 65535
• 16-bit ports numbered 0, 2, 4, ... , 65532, 65534
• 32-bit ports numbered 0, 4, 8, ... , 65528, 65532
 Memory-Mapped I/O
• By placing I/O devices memory address space
• Memory-mapped I/O provides additional
programming flexibility.
• Any instruction that references memory may
be used to access an I/O port located in the
memory space
• Memory-mapped I/O, like any other memory
reference, is subject to access protection and
control when executing in protected mode.
 I/O INSTRUCTIONS
• provide access to the processor's I/O ports for
the transfer of data to and from peripheral
devices
• These instructions have as one operand the
address of a port in the I/O address space
• There are two classes of I/O instruction
– transfer a single item
– transfer strings of items
 Register I/O Instructions
• IN and OUT are provided to move data
between I/O ports and the EAX (32-bit I/O),
the AX (I6-bit I/O), or AL (8-bit I/O) general
registers
• IN and OUT instructions address I/O ports
either directly, with the address of one of up
to 256 port addresses coded in the
instruction, or indirectly via the DX register to
one of up to 64K port addresses.
• IN (Input from Port) transfers a byte, word, or
doubleword from an input port to AL, AX, or
EAX
• OUT (Output to Port) transfers a byte, word,
or doubleword to an output port from AL, AX,
or EAX.
 Block I/O Instructions
• The block (or string) I/O instructions INS and
OUTS move blocks of data between I/O ports and
memory space. Block I/O instructions use the DX
register to specify the address of a port in the I/O
address space
• INS (Input String from Port) transfers a byte or a
word string element from an input port to
memory (ES:EDI)
• OUTS (Output String to Port) transfers a byte,
word, or doubleword string element to an output
port from memory (DS:ESI)
 PROTECTION AND I/O
• Two mechanisms
– IOPL field in the EFLAGS register defines the right
to use I/O-related instructions
– The I/O permission bit map of a 80386 TSS
segment defines the right to use ports in the I/O
address space
• These mechanisms operate only in protected
mode, including virtual 8086 mode
 I/O Privilege Level
• IOPL defines the privilege level needed to execute I/O-
related instructions
• The following instructions can be executed only if
CPL<=IOPL:
– IN -Input
– INS -Input String
– OUT -Output
– OUTS -Output String
– CLI -Clear Interrupt-Enable Flag
– STI -Set Interrupt-Enable Flag
• These instructions are called "sensitive" instructions,
because they are sensitive to IOPL
• Any attempt by a less privileged procedure to
use a sensitive instruction results in a general
protection exception.
• Because each task has its own unique copy of
the flags register, each task can have a
different IOPL
• A task whose primary function is to perform
I/O (a device driver) can benefit from having
an IOPL of three, thereby permitting all
procedures of the task to perform I/O.
• A task can change IOPL only with the POPF instruction
in a procedure executing at privilege level 0
• An attempt by a less privileged procedure to alter IOPL
does not result in an exception; IOPL simply remains
unaltered
• The POPF instruction may be used in addition to CLI
and STI to alter the interrupt-enable flag (IF); however,
changes to IF by POPF are IOPL-sensitive.
• A procedure may alter IF with a POPF instruction only
when executing at a level that is at least as privileged
as IOPL.
• An attempt by a less privileged procedure to alter IF in
this manner does not result in an exception; IF simply
remains unaltered
 I/O Permission Bit Map
• The I/O permission map is a bit vector
• The size of the map and its location in the TSS
segment are variable
• the I/O map base field, locates the I/O permission
map
• The I/O map base field is 16 bits wide and
contains the offset of the beginning of the I/O
permission map.
• The upper limit of the I/O permission map is the
same as the limit of the TSS segment.
I/O Address Bit Map
• In protected mode, when it encounters an I/O
instruction (IN, INS, OUT, or OUTS), the
processor first checks whether CPL <= IOPL.
• If this condition is true, the I/O operation may
proceed. If not true, the processor checks the
I/O permission map.
• In virtual 8086 mode, the processor consults
the map without regard for IOPL.
• Each bit in the map corresponds to an I/O port
byte address;
• e. g. the bit for port 41 -> I/O map base + 5, bit
offset 1.
• The processor tests all the bits that correspond to
the I/O addresses spanned by an I/O operation
• It is not necessary for the I/O permission map to
represent all the I/O addresses.
• I/O addresses not spanned by the map are
treated as if they had one bits in the map
• If I/O map base is greater than or equal to TSS
limit, the TSS segment has no I/O permission
map, and all I/O instructions in the 80386
program cause exceptions when CPL>IOPL
• Because the I/O permission map is in the TSS
segment, different tasks can have different
maps. Thus, the operating system can allocate
ports to a task by changing the I/O permission
map in the task's TSS
• Ref:
– 80386 Programmers’ Manual
– https://cs.nyu.edu/~mwalfish/classes/15fa/ref/i38
6/s08_03.htm