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MICROCONTROLLER
DIFFERENCES BETWEEN MICROCONTROLLER AND
MICROPROCESSOR
BASIC INTRODUCTION
INTRODUCTION TO 8051
FEATURES OF 8051
A total of 16 bytes from locations 20h to 2Fh are set aside for
bit addressable read/write memory.
A total of 80 bytes from locations 30h to 7Fh are used for read
and write storage which is known as scratch pad. These 80
locations of RAM are used for storing the data and parameters
of 8051 programmers.
Register banks in 8051:
A total of 32 bytes of RAM are set aside for the register banks
and stack. These 32 bytes are divided into 4 banks of registers
in which each bank has 8 registers, R0-R7.
The register bank 0 has the RAM locations from 0 to 7 where
R0 is the RAM location 0, R1 is the RAM location 1 and so
on.
The register bank 1 has the RAM locations from 08 to 0Fh
where the registers start from R0 to R7.
The third bank of registers R0 to R7 starts from memory
location 10h and goes to memory location 17h.
The fourth bank of registers R0 to R7 starts from memory
location 18h to 1Fh.
The register bank 1 uses the same memory space as the stack
which indicates that no other memory area can be used for the
stack.
Default register bank:
The RAM locations 00-1Fh are set aside for four register
banks. Among these 4 register banks, when the 8051 is
powered up, there will be only one register bank which can be
accessed.
The register bank that can be accessed on power up is the
register bank 0 which has the RAM locations starting from 00
to 07h.
How to switch register banks:
Register bank 0 is the default when 8051 is powered up. If we
want to switch from one register bank to other, then it can be
done using PSW register.
Bits D4 and D3 of the PSW are used to select the desired
register bank as shown in the table below.
The PSW.4 and PSW.3 are bit addressable instructions which
can be accessed using SETB and CLR.
For example, SETB PSW.3 will make PSW.3=1 and select
bank register 1.
Example Program:
External Memory:
External RAM or ROM can be interfaced to the 8051
microcontroller.
This will be done when the internal RAM and ROM memory
available on chip is not sufficient. The amount of external
RAM memory that can be added is up to 64KB.
When the external RAM and ROM are interfaced then they
can be interfaced using 16 bit PC and the DPTR.