SECTION B

Chapter 5
Basic Computer Organization & Design
Common Bus System
Instruction Set Completeness
Timing and Control
Instruction Cycle
Instruction Cycle
Fetch and Decode
Register Reference Instruction
Memory Reference Instruction
Input-Output Instruction
Input-Output and Interrupt
Interrupt Cycle
Complete Computer Description
Design of Accumulator Logic
 Chapter 7
Microprogrammed Control
Microprogrammed Control Unit
 Chapter 8
Central Processing Unit
CISC Characteristics
Computer Instructions
Data Transfer Instructions
Data Transfer Instructions
Data Manipulation Instructions
Arithmetic Instructions
Logical and Bit Manipulation Instructions
Shift Instructions
Program Control Instructions
Status Bit Conditions
Status Bit Conditions
 Chapter 9
Pipeline & Vector Processing
Parallel Processing
Flynn’s Classification
Pipeline Processing
Space Time Diagram
Arithmetic Pipeline
Instruction Pipeline
RISC Pipeline
Vector Processing
Array Processor
SECTION C
 Chapter 11
Input-Output Organization
Input-Output Interface
I/O Bus and Interface Module
I/O Bus and Interface Module
I/O Vs Memory Bus
 Modes of Data Transfer

• Programmed I/O

• Interrupt initiated I/O

• Direct memory access (DMA)

Example of Programmed I/O
Daisy Chaining Priority
Daisy Chaining Priority
Direct Memory Access (DMA)
Direct Memory Access (DMA)
Input-Output Processor (IOP)
 Chapter 13
Multiprocessors
Interconnection Structures
Time Shared Common Bus
Multiport Memory
Crossbar Switch
Multistage Switching Network
Multistage Switching Network
Multistage Switching Network
Multistage Switching Network
Hypercube Interconnection
 Chapter 12
Memory Organization
Associate Memory
Cache Memory
Associative Mapping
Direct Mapping
Direct Mapping
Direct Mapping
Set Associative Mapping
Virtual Memory
Virtual Memory
Cache Coherence
Cache Coherence