Flip-Flops and

Latches

 Basic to sequential circuits is the bistable circuit.


 Prominent examples of the bistable circuit found in
digital ICs are
 1. Latches
 2. Flip-flops

 there is a fundamental difference between them.

 Latches propagate values from input to output
continuously when enabled (typically by a clock
signal) whereas flip-flops propagate values at discrete
points in time (typically on the rising or falling edge of
a clock). 
 As such, latches are said to be level-sensitive or
transparent, whereas flip-flops are said to be edge-
triggered.

 

 Depend on Voltage level applying to the input

Bask Bistable Circuit

 The plotted VTC for Inverter 1, Vout versus Vin, and
Inverter 2, Vin versus Vout, are shown on the same
graph.

 Note that there are three possible operating points for
the circuit: points A, B, and C. A and B are stable
operating points, while C is an unstable point
(sometimes referred to as a metastable point).
 
 At point C, the slope is positive and greater than unity (in
magnitude). Both Inverter 1 and 2 are conducting. As a result,
point C is unstable since any small voltage change introduced
into the circuit at, say Vin, will be amplified and regenerated
around the circuit loop, causing the operating point to move to
one of the two stable points.

 In essence, the crosscoupling of two inverter circuits results in a

bistable circuit with two stable states.
 The average propagation delay for a single gate is
given by


SR Latch

 
 One of the inputs of each NOR gate is used to
cross-couple to the output of the other NOR gate,
while the second input provides a means of
triggering the latch from one stable state to the
other. This circuit is considered to be a latch
SR Latch Design Using NOR Gates

SR Latch Design Using NAND Gates

JK Flip-Flop

JK Master-Slave Flip-Flop

JK Edge-Triggered Flip-Flop

D Flip-Flops and Latches

D-Latch Operation

D – Flip flop operation

Gate Level Realization of D- Latch

CMOS Implementation of D-Latch
