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Mikrokontroler AVR
Mikroprosesor dan Antarmuka
Oleh: Amin Suharjono
Topics
AVR’s CPU
- Its architecture
- Some simple programs
Data Memory access
Program memory
RISC architecture
RAM EEPROM Timers
PROGRAM
Flash ROM
Program Data
Bus Bus
CPU
Interrupt Other
OSC Ports
Unit Peripherals
I/O
PINS
…
- Status Register SREG: I T H S V N Z C
R15
CPU R16
R17
…
PC
…
- R23 = 0x27 SREG: I T H S V N Z C
CPU
R15
R16
R17
PC
…
R30
Instruction decoder
R31
Instruction Register
registers
…
-
SREG: I T H S V N Z C
- R25 = R25 + R9
CPU
R15
- ADD R17,R30 R16
R17
- R17 = R17 + R30
PC
…
R30
Instruction decoder
R31
Instruction Register
registers
R0
ALU R1
R2
…
SREG: I T H S V N Z C
CPU
R15
R16
R17
PC
…
R30
Instruction decoder
R31
Instruction Register
registers
…
SREG: I T H S V N Z C
CPU
R15
R16
R17
PC
…
R30
Instruction decoder
R31
Instruction Register
registers
DEC Rd R0
ALU R1
- Rd = Rd - 1 R2
Example:
…
SREG: I T H S V N Z C
- DEC R23
CPU
R15
- R23 = R23 - 1 R16
R17
PC
…
R30
Instruction decoder
R31
Instruction Register
registers
Purpose
...
Registers R31
$001F I/O Address I/O
$0020 Example:
TWBR
TWSR
$00 Add contents
$01
of location
Example: 0x90
Store to contents
0x53 into the of location
PINS SPH 0x95
register.
Standard I/O Example:
and store What doesinthe
the result following
location
The
LDS
STS (Load
(Store instruction
0x313.
address of
directSPH do?space)
isdata
from
direct to 0x5E
data space)
Example: Write a program that stores 55 into location 0x80 of RAM.
...
Registers
$005F LDS
of RAM
SREG R20,2
Solution:
SPH $3E
into location 0x81.
LDS
STS Rd, addr ;[addr]=Rd
;Rd = [addr]
$3F
$0060 addr,Rd
General LDS R20, 0x90 Solution:
;R20 = [0x90]
purpose Solution:
Answer:
...
Purpose
of the SRAM
...
Registers R31
$001F I/O Address I/O
$0020 TWBR
Solution:
$00
OUT IOAddr,Rd
PINS
;[addr]=Rd
Standard I/O
TWSR $01
IN Rd,IOaddress
Using Names of;Rd
IO = [addr]
registers
...
Registers
SPH $3E
$005F SREG $3F
$0060 IN R21,PIND ;R21 = PIND
General Example:
Example:
purpose
ADD R20,R21 ;R20 = R20 + R21
...
RAM
(SRAM)
OUTOUT 0x3F,R12
IN SPH,R12
R1, 0x3F ;R1;SREG = R12
= SREG
;OUT 0x3E,R12
STS 0x90,R20 ;[0x90] = R20
IN OUT 0x3E,R15;R17
IN R17,0x3E
R15,SREG ;SPH
;IN = R15
= SPH
R15,0x3F
$FFFF
...
LDI R20,
LDI
LDI
LDI R20, 0x9C
R20,
R16, 0x9C
0xA5
0x52 ;R16 = 0x38
0x38 Registers
R0 $001F IO Address
ALU LDI
LDI
LDI R21,
LDI R21,
R21, 0x9C
0x23
0x73
R17, 0x64
0x2FR1 ;R17 = 0x2F$0020 TWBR $00
TWSR $01
R2 Standard R20
IO
SUB R20,
SUB
ADD
ADD R20, R21
R20, R21
R21
R16, R17;subtract
;subtract
;add R21
R21 toR21 from
R20from R20
;add R17 to R16Registers
...
...
…
SPH
SREG: I T H S V N Z C $3E
Solution:
Solution:
Solution:
$005F SREG $3F
CPU
Solution: R15 11
$0060
$520101
$9C
$A5 0010
R16
1001 1100
1010 1100
0101
$380011
$9C 1001 1000 General
- $730111R17
0011 purpose
+-- +$64
$9C
$23 10010100
0010 1100
0011
...
$2F0010
0110 1111 RAM
PC$DF 1101 1111 R20 = $DF
…
$00
$82$1000000
1000 0000
0010
$67 0110 R20
0111R20
1 0000 = $00
= $82
0000R16 = 0x67
R20 = 00(SRAM)
C = 1 because R21 is bigger than R20 and there is a borrow from D8 bit.
CCC===100because
becausethere
because R21 is
R21 is
isnot
not
ahas
R30 bigger
bigger
carry than R20
than
beyond R20
the andbit.
and
D7 there is
there is no
no borrow
borrow from
from D8
D8 bit.
bit.
Z
C
Instruction == 00 decoder
because
because the
thereR20
is no a value
carry other
beyond than
the D7 zero
bit. after the subtraction.
HZZ == 01 because
because the
the R20
R20R31is zero
has afterother
a value the D3
subtraction.
than 0 after the subtraction.
H == 11 because
because there
there is
is aa carry
borrow
carry from
from
from the
D4D3
the toto the
D3.
to the D4
D4 bit.
bit.
ZHH == 00 Register
because there
because there is
is no
no borrow
borrow from
fromaD4
D4 toto D3.
D3.in it after the addition.
Z == 10 because
Instruction because the
the R20
R16 (the
(the result)
registers result) has
has a value
value 0other than 0 after the addition.
$FFFF
Amin Suharjono