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What to do

• We have to implement a full-adder using


basic logic gates

Apr 5, 2021 CSE 226: Digital Logic Design Lab 2


Truth Table

Cin A B S Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Apr 5, 2021 CSE 226: Digital Logic Design Lab 3


How to proceed
• First, simulate a one-bit full-adder in logisim using
“adder”
• Get the truth table
• Find expressions for S and Cout
• Try to use XOR gates
• Extend the idea of adders by designing a 4 bit adders
in logisim using 4 1-bit full adders

Apr 5, 2021 CSE 226: Digital Logic Design Lab 4


Writing Report
• The report should contain
• Truth table for 1-bit full adder
• Conversion to use XOR
• Logic gate diagrams for S and Cout
• Logisim design for 4 bit adders that uses
• 4 1-bit full adders
• Lesson learned from the experiment in your own words (at
least three complete sentences)

Apr 5, 2021 CSE 226: Digital Logic Design Lab 5

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