Complex Programmable Logic

Devices (CPLD)
 Think & Answer

CPLD Stands For….?

Give your answers in the chat window

 Complex Programmable Logic Devices (CPLD)
 A CPLD comprises multiple PAL-like blocks on a single chip with
programmable interconnect to connect the blocks. ‰
 Each PAL function block has 16 Macro-cells.
 Each Macro-cell has access to 16 signals from I/O Blocks.

Source:
 Complex Programmable Logic Devices (CPLD)

 The PAL block consists of macro cells.

 Macro cells are defined as functional blocks responsible for performing

sequential or combinational logic.
 The macro cell consists of AND/OR array, Flip-flop, Multiplexer, XOR gate.

 AND/OR arrays are completely reprogrammable and responsible for performing

various logic functions.
 The flip-flop is used to store the output value produced by the XOR gate.

 XOR gates provide negation ability.

 Multiplexer is used to select either combinational(Non Register) or sequential

logic(Register)

Source:
Internal Structure of a PAL Block (Macro Cell)
 Logic Implementation using Macro-Cell
Problem 1: Implement the Boolean function Y=( A.B)‘=∑m(0,1,2)
using macro-cell
Solution:
Problem 2: Implement the given Boolean function using CPLD
f = x1 x3 x6’+ x1 x4 x5 x6’ + x2 x3 x7 + x2 x4 x5 x7

Note: For given Boolean function programming is indicated with orange cross mark
 Exercise Problem
1. Implement the Boolean function Y=A’B’+ ABC using Macro-cell
 Exercise Problem
2. Implement Half Adder using CPLD Macro-cell
 Applications of CPLD

 CPLDs are ideal for high performance, critical control applications.

 CPLD can be used in digital designs to perform the functions of boot
loader.
 CPLD is used for loading the configuration data of a field
programmable gate array from non-volatile memory.
 Generally, these are used in small design applications like address
decoding.
 CPLDs are frequently used many applications like in cost sensitive,
battery operated portable devices due to its low size and usage of
low power.