ESE 350

Embedded Systems/Microcontroller
Laboratory

Lecture 5
Stack, Subroutines, and Interrupts
Professor Rahul Mangharam
Electrical and Systems Engineering
University of Pennsylvania
 Stack
A stack is a data structure type that uses Last In-First Out (LIFO) to
access its contents.

Some examples of real world stacks:

Stack of papers
Stack of books
Spring loaded stack of plates usually found in cafeterias

Key characteristic:
Items are accessible only from one end-the top.

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 Stack Structure & Operation

PUSH POP (PULL)

TOP Pop: Removes and

Push: Put element on top returns the current top
of stack leaving previous element of the stack
elements below it

BOTTOM

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 MC9S12C128 Stack (in Memory)
CPU Register:
XX SP Stack Pointer (SP)

$3001 $00 TOP Byte $C0 $00

Lower $20
Addresses $00 A 16-bit stack pointer (SP) points to the
location above the top byte of the stack.

The stack grows from high

addresses toward lower addresses.
$3FFD $00
Register-Memory Transfers
$3FFE $E0 The MC9S12C128 CPU registers
can be pushed into the stack.
$3FFF $0C BOTTOM Byte The top element (s) of the stack can
be pulled into a CPU register.

Set in hardware 4
 Push and Pull Instructions
- PSHA: Push A onto the stack
- PSHB: Push B onto the stack
- PSHX: Push X onto the stack (low order byte is pushed first)
- PSHY: Push Y onto the stack (low order byte is pushed first)
- PULA: Pull A from the stack
- PULB: Pull B from the stack
- PULX: Pull X from the stack (high order byte is pulled first)
- PULY: Pull Y from the stack (high order byte is pulled first)
PUSH (PSHA, PSHB, PSHX, PSHY)
Put contents of register onto stack, then decrement SP by 1 for
Accumulator A, B or 2 for Index registers X, Y.
PULL (PULA, PULB, PULX, PULY)
Increment SP by 1 for Accumulator A, B or 2 for Index registers X, Y
then load contents onto register.
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 Stack Pointer Instructions
[<label>] DES [<comment>] decrements the contents of the stack pointer by 1
[<label>] INS [<comment>] increments the contents of the stack pointer by 1

[<label>] LDS <opr> [<comment>] loads the contents of a memory location

or an immediate value into SP
[<label>] STS <opr> [<comment>] stores the contents of the stack pointer in
a memory location

[<label>] TSX [<comment>] places the contents of SP plus one into X

[<label>] TSY [<comment>] places the contents of SP plus one into Y
[<label>] TXS [<comment>] places the contents of X minus one into SP
[<label>] TYS [<comment>] places the contents of Y minus one into SP

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 Stack Example
Example: With SP=$3FFF,
LDAA #$10
PSHA
LDAA #$20
PSHA
PULB

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 Stack Example-Diagram
$3FFF XX SP $3F $FF

LDAA #$10 $3FFE XX SP $3F $FE

PSHA $3FFF $10

$3FFD XX SP $3F $FD

LDAA #$20
$3FFE $20
PSHA
$3FFF $10

PULB $3FFE XX SP $3F $FE

$3FFF $10 8
 Subroutine
- Sequence of instructions that can be called from other places in program
- Allows the same operation to be performed with different parameters
- Simplifies the design of a complex program by using the divide-and-
conquer approach
Assembly instructions related subroutine calls

[<label>] BSR <rel> [<comment>] ; branch to subroutine

[<label>] JSR <opr> [<comment>] ; jump to subroutine
[<label>] RTS [<comment>] ; return from subroutine

where
<rel> is the offset to the subroutine (Relative Addressing Mode limit range -128 to 127 bytes*)
<opr> is the address of the subroutine and is specified in the DIR, EXT, or INDexed
addressing mode.

*Offset is signed binary:$00-$7F (0 to127), $80-$FF (-128 to -1) 9

 Program Structure/Subroutine Processing
Program Structure Subroutine Processing

Main program
Main program
<call> sub_x
.
Subroutine 1 Subroutine 2 Subroutine 3 .
.
sub_x: .
Subroutine 1.1 Subroutine 2.1 Subroutine 3.1
.
.
Subroutine <return>
Subroutine 2.1.1 Subroutine 2.1.2

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 Subroutine Program 1
C Language Assembly

$8000
void func1(){
PORTB|=0x02;
}
$8010 JSR $9000
main(){
$8020 JSR $9000
func1();

func1();
$9000 BSET PORTB,X $02
$9003 RTS
}

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 Subroutine Program 2-Nested
C Language Assembly
$8000

void func2(){
func1(); $8030 JSR $A000
}

main(){ $9000 BSET PORTB,X $02

$9003 RTS
func2();
$A000

$A100 JSR $9000

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 Subroutine Relation to Stack
JSR pushes the “current” Program Counter (PC)* onto the stack then
jump to the subroutine
RTS pops old PC from stack and continues execution
Program 1 Program 2
$8030 JSR $A000
$8010 JSR $9000
$A100 JSR $9000
$9000 BSET PORTB,X $02
XX SP

$A1
XX SP
$03
$80
$80
$13
$33

*”Current” PC is PC of jump plus 2 or 3 depending on addressing mode used.

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 Recall Polling from Lab 1
Polling continually checks the status of the input PORTA pin A2 to detect
a key press.
void switch_down() {
printf(“Switch down \r\n”);
}
No key press, keep
main() { waiting in loop until
while(1) { pressed
while(!(PORTA & 0x04)) {
} Key still pressed,
switch_down(); keep waiting in loop
while(PORTA & 0x04) { until released
}
}
return 0;
}
CPU tied up waiting for the key press!
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 Basics of Interrupts
What is an interrupt?

A special event that requires the CPU to stop normal program execution and
perform some service related to the event. Examples of interrupts include
I/O completion, timer time-out, illegal opcodes, arithmetic overflow, divide-by-0,
etc.

Functions of Interrupts

- Coordinating I/O activities and preventing CPU from being tied up

- Providing a graceful way to exit from errors
- Reminding the CPU to perform routine tasks

Interrupt Maskability

- Interrupts that can be ignored by the CPU are called maskable interrupts. A
maskable interrupt must be enabled before it can interrupt the CPU. An interrupt is
enabled by setting an enable flag.
- Interrupts that can’t be ignored by the CPU are called nonmaskable interrupts. 15
 Interrupt Priority & Service
Interrupt priority
The order in which the CPU will service interrupts when all of them occur at the
same time.

Interrupt Service
The CPU provides service to an interrupt by executing a program called the
interrupt service routine (ISR).

A complete interrupt service cycle includes

1. Saving the program counter value in the stack

2. Saving the CPU status (including the CPU status register and some other
registers) in the stack
3. Identifying the cause of interrupt
4. Resolving the starting address of the corresponding interrupt service routine
5. Executing the interrupt service routine
6. Restoring the CPU status and the program counter from the stack
7. Restarting the interrupted program
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 Interrupt Analogy
You & homework CPU
You’re doing your homework Running some program

You hear your phone ring Flag an event

You expected this call Enable interrupts for event

You put your homework aside Save registers on stack

You pick up the phone & talk Execute event ISR

You finish talking & Continue interrupted

go back to your homework program
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 MC9S12C128 Interrupts
The MC9S12C128 supports 40+ hardware interrupts and two software
interrupts. Hardware interrupts include:

SCI serial system

SPI serial transfer
Pulse Accumulator input edge
Pulse accumulator overflow
Timer overflow
Timer output compare 1-8
Timer input capture 1-8
Real time interrupt

Software interrupts: SWI instruction and TRAP.

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Interrupt Relation to Stack

SP after interrupt
Low address
CCR
B
A
XH
XL
YH
YL
PCH
High address PCL SP before interrupt

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 Interrupt Programming
Interrupt Vector
Starting address of the interrupt service routine

Interrupt Vector Table

A table where all interrupt vectors are stored.
For MC9S12C128, the vectors exist at a predefined memory location

Steps of Interrupt Programming

Step 1. Writing the interrupt service routine

Step 2. Initializing the interrupt vector table
Step 3. Enabling the interrupt

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 Writing the ISR
Assembly Language:

xxx_ISR …
…
RTI

C Language:

void xxx_ISR ( )
{
…
}

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 Enable Interrupts
Simply include the following line:

EnableInterrupts;

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