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System Design using Verilog

Lecture 4
GMR Institute of Technology

(1) Semi-Custom ASIC


(2) Example-1
(3) Example-2
Semi-Custom ASICs (Standard Cell Based Design)

C1 C2 C3 C4 C5 C6 C7 C8

F1 F2 F3
GMR Institute of Technology

Final Design
Semi-Custom ASICs
Example-1 Design of Half Adder
GMR Institute of Technology
Semi-Custom ASICs
Example-2 Design of 3-Bit Full Adder
GMR Institute of Technology

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