Ch1-4 COA

Computer Organization and Architecture
Chapter 1 and 3 – Digital Logic and Digital Systems

Contents
 Computer Organization Vs Architecture

 Logic gates and Boolean algebra
 Combinational Circuits
 Sequential Circuits
SMU-Computer Science Department

Computer Organization Vs Architecture
 A distinction is often made between computer architecture and

computer organization
 Computer architecture refers to attributes of a system visible to a programmer,
attributes that have a direct impact on the logical execution of a program.
• Instruction Set Architecture (ISA) often used interchangeably with computer
architecture. The ISA defines instruction formats, instruction opcodes, registers,
instruction and data memory; the effect of executed instructions on the registers
and memory; and an algorithm for controlling instruction execution.
 Computer organization refers to the operational units and their
interconnections that realize the architectural specifications.
• Examples of architectural attributes: the instruction set, the number of bits used to
represent various data types (e.g., numbers, characters), I/O mechanisms, and
techniques for addressing memory.
• Organizational attributes include those hardware details transparent to the
programmer, such as control signals; interfaces between the computer and
peripherals; and the memory technology used.
Digital Computers and Digital Systems
 The digital computer is a digital system that performs various

computational tasks.
 The word digital implies that the information in the computer
is represented by variables that take a limited number of
discrete values.
 These values are processed internally by components that can
maintain a limited number of discrete states.
 Digital computers use the binary number system, which has
two digits: 0 and 1, digit is called a bit.

Main Components of a Computer
 Virtually all contemporary computer designs are based on the

concepts developed by John von Neumann
 At a top level, a computer consists of CPU (central processing unit),
memory, and I/O components, with one or more modules of each type.
 Key Concepts:
 Data and instructions are stored in a single
read–write memory
 The contents of this memory are addressable
by location, without regard to the type of
data contained there
 Execution occurs in a sequential
fashion(unless explicitly modified) from one
instruction to the next.
Main Components of a Computer
 The central processing unit (CPU) contains an arithmetic and

logic unit for manipulating data, a number of registers for
storing data, and control circuits for fetching and executing
instructions.
 The memory of a computer contains storage for instructions
and data it is called a Random-Access Memory (RAM).
 The Input and Output Processor (IOP) contains electronic
circuits for communicating and controlling the transfer of
information between the computer and the outside world.

Classification of Computers
 Classification by physical size, price, capacity, performance,

…
 Super Computers: fastest, largest & most potential types of computers
• They are multi-user systems in intercontinental range
• They can carry out enormously complex scientific calculations
 Mainframe Computers: Smaller than super computers in size and
capacity, lower in speed & memory capacity
• They are multi-user systems and handle hundreds of users
• Usually used in large organizations
 Mini Computers: Smaller than mainframe computers in size and
capacity, lower in speed & memory capacity
• They use terminals for inputs and output and Used in small organizations
 Micro Computers:
• Personal computers with single microprocessor
 Other futures of these types of computers
SMU-Computer are left for you for reading
Science Department
Classification of Computers
 Classification by the method of operation (processing)

 Analog Computers: Operates by measuring and deal with continues
variables. Example: Thermometer, Voltmeter, Speedometer
 Digital Computers: Deal with discrete variables and operate by
counting. Example: The general purpose computers
 Hybrid Computers: Processes input data with analog method, convert it
into digital quantities, processes digital values and convert the output
from digital to analog form
• Example: Electrocardiogram or ECG machine
 Classification by purpose of application:
 Special purpose computers: Designed to solve a single type of problem
 General-purpose computers: Designed to solve variety of problems
through the use of “store program concept”

Logic Gates
 The basic elements of a digital computer must perform data

storage, movement, processing, and control functions.
 Only two fundamental types of components are required: gates
and memory cells.
 A gate is a device that implements a simple Boolean or logical
function.
 For example, an AND gate with inputs A and B and output C
implements the expression IF A AND B ARE TRUE THEN C IS TRUE.
 Such devices are called gates because they control data flow in much
the same way that canal gates control the flow of water.
 The memory cell is a device that can store one bit of data; that
is, the device can be in one of two stable states at any time.
Logic Gates
 By interconnecting large numbers of these fundamental

devices, we can construct a computer.
 We can relate this to our four basic functions as follows:
 Data storage: Provided by memory cells.
 Data processing: Provided by gates.
 Data movement: The paths among components are used to move data
from memory to memory and from memory through gates to memory.
 Control: The paths among components can carry control signals.
 Binary information is represented in digital computers by
physical quantities called signals.
 Electrical signals such as voltages exist throughout the
computer in either one of two recognizable states: 1 or 0.
Logic Gates
 Binary logic deals with binary variables and with operations

that assume a logical meaning.
 It is used to describe, in algebraic or tabular form, the
manipulation and processing of binary information.
 Gates are blocks of hardware that produce signals of binary 1
or 0 when input logic requirements are satisfied.
 Each gate has a distinct graphic symbol and its operation can
be described by means of an algebraic expression.
 The basic gates used in digital logic are AND, OR, NOT,
NAND, & NOR.
 We have also XOR gate for defining Boolean algebra with
other gates. SMU-Computer Science Department
NOT Gate:
 Performs a basic logic function called inversion or

complementation.
 The purpose of this gate to change one logic level

(HIGH/LOW) to the opposite logic level.
 Application:
 It is used in CMOS inverters to generate waveforms
 Used in temperature control circuits
 Extensively used in control circuits

NOT Gate:
 Algebraic Notation: X= Ā
 Logic symbol of NOT gate:
 Truth Table: Example
A Ā
1 0
0 1

OR Gate:
 The OR gate is composed of two or more inputs and a single output
 Performs Logical addition
 The logical operation of the OR gate:

 The output is HIGH (1) when any of the inputs are HIGH
 Otherwise it is LOW (0)
 OR gate is an electronic circuit that gives a high output if one or more of its inputs are
high
 A plus (+) is used to show the OR operation

OR Gate:
 The total number of combinations possible for a logical gate is always

determined by the formula [N=2n]
 Application:
 The most common application of OR gate is an intrusion detection and an alarm system.
 The system can be used in a home, office, etc.

• The sensors of the alarm detection system produce a HIGH voltage when open and a LOW
voltage when closed.
• As long as the windows and doors are closed, the switches are also closed which means there is
no intrusion and so the system is secure. And all the inputs are therefore LOW. When any one of
the windows or doors is opened, a HIGH input is given and a HIGH output results and hence it
activates the alarm system.

OR Gate:
 Algebraic Notation: Z= X+Y
 Logic symbol of OR gate:

Example
 Truth Table:
X Y Z
0 0 0
0 1 1
1 0 1
1 1 1

AND Gate:
 The AND gate is composed of two or more inputs and a single output
 Performs logical multiplication
 The logical operation of the AND gate:

 The output is HIGH (1) when all the input are HIGH
 Otherwise it is LOW (0).
 A dot (.) is used to show the AND operation.
 The total number of combinations possible for a logical gate is always

determined by the formula [N=2n]

AND Gate:
 Application:
 It allows and inhibits the passage of the signal at certain times
• That is we can say that the AND gate works as an enable gate at certain
times and the Inhibitor gate at other times.
 The main AND gate application is in digital electronics and in data

transmission. Where AND gate helps for allowing or not allowing the
data through a channel.
 Automatic temperature-regulating circuits
 Freezer warning buzzer devices

AND Gate:
 Algebraic Notation: Z= X*Y
 Logic symbol of AND gate:
 Truth Table: Example

X Y Z
0 0 0
0 1 0
1 0 0
1 1 1

Combination of Logic Gates
 Using combination of logic gates, complex operation can be

performed.
 Some basic combinations of gates include:

 NAND gate
 NOR gate
 Exclusive-OR(XOR)
 Exclusive-NOR(XNOR)

NAND Gate
 NAND gate in digital electronics serves as a universal gate

 This gate can be used in combination with any of the basic gates And Or Not.
 As the term implies, NAND stands for NOT and AND gates
 NAND gate is known for inverting the values or the output given
by And gate
 The logical operation of the NAND gate is such that the output is
LOW (0) only when all the inputs are HIGH (1).

NAND Gate
 Application:
 The 1st and foremost application of using the Nand gate is to get the
desired output by combining it with other gates, and the most common
real-life example of it is a burglar alarm.
 During a closed switch, either of the input to NAND gate is false i.e.
LOW. Hence the output is high, and the buzzer rings. When the switch
is open, both the inputs are High, thus producing a low output, and the
buzzer does not ring.

NAND Gate:
 Algebraic Notation: Z= (X*Y)’
 Logic symbol of NAND gate:
 Truth Table:
X Y Z
0 0 1
0 1 1 Example
1 0 1
1 1 0

NOR Gate
 The NOR gate in digital electronics is a combination of logical OR

gate and the logical NOT gate.
 It gives a false output when either of its inputs is HIGH (binary 1).
 It does produce a High (binary 1) output when all of its inputs are
Low (binary 0).
 To sum up, the principle of the NOR gate is as follows…

 The output for a 2 input Nor gate is Low (binary 0) if either input or both the
input is HIGH and is HIGH if both are Low.

NOR Gate
 Application:
 Half adders and Full adders: The half adder is used to add only two
numbers. To overcome this problem, the full adder was developed. The
full adder is used to add three 1-bit binary numbers A, B, and carry C.
The full adder has three input states and two output states i.e., sum and
carry.
 Multipliers: A binary multiplier is an electronic circuit used in digital

electronics, such as a computer, to multiply two binary numbers.
 Ripple carry adders:

NOR Gate:
 Algebraic Notation: Z= (X*Y)’
 Logic symbol of NOR gate:
 Truth Table:
X Y Z
0 0 1
0 1 0 Example
1 0 0
1 1 0

XOR Gate
 Exclusive OR Gate, also known as EX OR Gate or XOR Gate

 The output of an XOR gate is true only when exactly one of its
inputs is true.
 If both of an XOR gate's inputs are false, or if both of its
inputs are true, then the output of the XOR gate is false.
 If an XOR gate has more than two inputs, then its behavior
depends on its implementation.
 In the vast majority of cases, an XOR gate will output true if
an odd number of its inputs is true.

XOR Gate
 Algebraic Notation: Z= (X Y)
 Logic symbol of XOR gate:
 Truth Table:
X Y Z
0 0 0
0 1 1
1 0 1 Example
1 1 0

Exclusive – NOR (XNOR) Gate
 The XNOR gate (also known as a XORN’T, ENOR, EXNOR

or NXOR)
 Its function is the logical complement of the exclusive OR
gate (XOR gate).
 Logically, an XNOR gate is a NOT gate followed by an XOR
gate.
 That means the output of the XOR gate is inverted in the XNOR gate.
 The output is 0 when only one input is 0, and the output is 1
when both inputs are the same (i.e. either two 0’s or two 1’s).

Exclusive-NOR (XNOR) Gate
 Algebraic Notation: Z= (X Y)
 Logic symbol of XNOR gate:
 Truth Table:
X Y Z
0 0 1
0 1 0
1 0 0
1 1 1

Boolean Algebra
 The digital circuitry in digital computers and other digital

systems is designed, and its behavior is analyzed, with the use
of a mathematical discipline known as Boolean algebra.
 Boolean algebra turns out to be a convenient tool in two areas:
 Analysis: It is an economical way of describing the function of digital
circuitry.
 Design: Given a desired function, Boolean algebra can be applied to
develop a simplified implementation of that function.
 Input and Output signals can be represented by Boolean
Variables
 Function of the Digital Logic Circuits can be represented by
Logic Operations, i.e., Boolean Function(s)
Boolean Algebra
 From a Boolean function, a logic diagram can be constructed

using AND, OR, and I.
 The most elementary specification of the function of a Digital
Logic Circuit is the Truth Table
 Table that describes the Output Values for all the combinations
of the Input Values, called MINTERMS
 Example: Truth table for the following diagram
F = x + y’z

Boolean Algebra
 The purpose of Boolean algebra is to facilitate the analysis and

design of digital circuits . It provides a convenient tool to
 Express in algebraic form a truth table relationship between binary
variables
 Express in algebraic form the input-outputs relationship of logic
diagram
 Find simplest circuits from the same function
 Any Boolean function can be implemented in electronic form
as a network of gates.
 For any given function, there are a number of alternative
realizations.

Boolean Algebra
 Basic Identities of Boolean Algebra:

Boolean Algebra – Circuit Simplification
 Three methods that can be used to achieve simplification are

 Algebraic simplification
 Karnaugh maps
 Quine–McCluskey tables
 Algebraic simplification:
 Involves the application of the Boolean algebra identities to reduce the
Boolean expression to one with fewer elements
 Example:
F = B(A’+C’) + A’BC + ABC’
F = BA’ + BC’ + A’BC+ABC’
F = A’(B+BC) + BC’(1+A)
F = A’B + ABC’
F = B(A’+AC’)
 Any Boolean function can be implemented in electronic form

as a network of gates.
 For any given function, there are a number of alternative
realizations.
 The SOP form expresses that the output is 1 if any of the input
combinations that produce 1 is true. This form of expression is known
as the sum of products (SOP) form.
 The SOP form expresses that the output is 1 if any of the input
combinations that produce 1 is true.
 A Boolean function can be realized in either SOP or POS form
 The SOP has one term for each 1, and the POS has one term for
each 0.
 The choice for realization would depend on whether the truth

table contains more 1s or 0s for the output function:
 However, there are other considerations:
 It is often possible to derive a simpler Boolean expression from the
truth table than either SOP or POS
 It may be preferable to implement the function with a single gate type
(NAND or NOR)
 The significance of the first point is that, with a simpler Boolean
expression, fewer gates will be needed to implement the function.

 Karnaugh Maps Simplifications

 A convenient way of representing a Boolean function of a small
number (up to four) of variables.
 The map is an array of 2n squares, representing all possible
combinations of values of n binary variables.
 It is essential to list the combinations in the order 00, 01, 11, 10.
 The squares corresponding to the combinations are to be used for
recording information, the combinations are customarily written above
the squares.
 In the case of three variables, the representation is an arrangement of
eight squares, with the values for one of the variables to the left and for
the other two variables above the squares.
 For four variables, 16 squares are needed, with the arrangement of two
variables on the left and two on the top.

 The map can be used to represent any Boolean function in the
following way.
• Each square corresponds to a unique product in the sum-of-products form,
with a 1 value corresponding to the variable and a 0 value corresponding
to the NOT of that variable.
• For each such product in the function, 1 is placed in the corresponding
square.
• To convert from a Boolean expression to a map, it is first necessary to put
the expression into what is referred to as canonical form: each term in the
expression must contain each variable.



 Rules for simplification:
• Among the marked squares (squares with a 1), find those that belong to a
unique largest block of 1, 2, 4, or 8 and circle those blocks.
• Select additional blocks of marked squares that are as large as possible and
as few in number as possible, but include every marked square at least
once. The results may not be unique in some cases. For example, if a
marked square combines with exactly two other squares, and there is no
fourth marked square to complete a larger group, then there is a choice to
be made as two which of the two groupings to choose. When you are
circling groups, you are allowed to use the same 1 value more than once.
• Continue to draw loops around single marked squares, or pairs of adjacent
marked squares, or groups of four, eight, and so on in such a way that
every marked square belongs to at least one loop; then use as few of these
blocks as possible to include all marked squares.

 Quine-McCluskey Simplifications
 Assignment

Combinational Circuits
 A combinational circuit is an interconnected set of gates whose

output at any time is a function only of the input at that time.
 As with a single gate, the appearance of the input is followed
almost immediately by the appearance of the output, with only
gate delays.
 In general terms, a combinational circuit consists of n binary
inputs and m binary outputs.
 As with a gate, a combinational circuit can be defined in 3 ways
 Truth table: For each of the 2n possible combinations of input signals, the
binary value of each of the m output signals is listed.
 Graphical symbols: The interconnected layout of gates is depicted.
 Boolean equations: Each output signal is expressed as a Boolean function
of its input signals. SMU-Computer Science Department
Combinational Circuits – Multiplexer
 Connects multiple inputs to a single output.

 At any time, one of the inputs is selected to be passed to the output.
 A general block diagram representation is shown in Figure 11.12.
 This represents a 4-to-1 multiplexer.
 There are four input lines, labeled D0, D1, D2, and D3.
 One of these lines is selected to provide the output signal F.
 To select one of the four possible inputs, a 2-bit selection code is
needed, and this is implemented as two select lines labeled S1 and S2.

Combinational Circuits – Multiplexer
 Multiplexers are used in digital circuits to control signal and

data routing.
 Example: loading of the program counter (PC). The value to be loaded
into the program counter may come from one of several different
sources:
• A binary counter, if the PC is to be incremented for the next instruction
• The instruction register, if a branch instruction using a direct address has
just been executed
• The output of the ALU, if the branch instruction specifies the address
using a displacement mode
 These various inputs could be connected to the input lines of a
multiplexer, with the PC connected to the output line.
 The select lines determine which value is loaded into the PC.
Combinational Circuits – Decoder
 A decoder is a combinational circuit with a number of output

lines, only one of which is asserted at any time.
 Which output line is asserted depends on the pattern of input
lines. In general, a decoder has n inputs and 2n outputs.

Combinational Circuits – Decoder
 Decoders find many uses in digital computers. One example is

address decoding.
 Suppose we wish to construct a 1K-byte memory using four 256 * 8-
bit RAM chips. We want a single unified address space, which can be
broken down as follows:
Address Chip
0000-00FF 0
0100-01FF 1
0200-02FF 2
0300-03FF 3
 Each chip requires 8 address lines, and these are supplied by the lower-
order 8 bits of the address.
 The higher-order 2 bits of the 10-bit address are used to select one of
the four RAM chips. For this purpose, a 2-to-4 decoder is used whose
output enables one of the four chips
Combinational Circuits – Read-Only Memory (ROM)
 Memory that is implemented with combinational circuits

 Combinational circuits are often referred to as “memoryless” circuits
because their output depends only on their current input and no history
of prior inputs is retained
 Memory unit that performs only the read operation
 Binary information stored in a ROM is permanent and is created during
the fabrication process
 A given input to the ROM (address lines) always produces the same
output (data lines)
 Because the outputs are a function only of the present inputs, ROM is a
combinational circuit

Combinational Circuits – Adders
 Half adder:
 The most basic digital arithmetic circuit is the addition of two binary
digits
 A combinational circuit that performs the arithmetic addition of two
bits is called a half-adder
 Full Adder
 One that performs the addition of three bits(two significant bits and a
previous carry) is called a full-adder
 Two half adders are needed to implement a full adder
 It is necessary to specify two output variables because the sum of 1+1
is binary 10

Sequential Circuit
Current output
depends not only
on the current
input, but also on
the past history of
inputs
Sequential
Circuit
Makes use of
combinational
circuits

Sequential Circuit
 Combinational circuits implement the essential functions of a

digital computer.
 However, except for the special case of ROM, they provide no memory
or state information, elements also essential to the operation of a digital
computer.
 For the latter purposes, a more complex form of digital logic
circuit is used: the sequential circuit.
 The current output of a sequential circuit depends not only on
the current input, but also on the past history of inputs.
 Another and generally more useful way to view it is that the
current output of a sequential circuit depends on the current
input and the current state of that circuit.
Sequential Circuit – Flip–Flops
 Simplest form of sequential circuit

 There are a variety of flip-flops, all of which share two
properties:
 The flip-flop is a bistable device. It exists in one of two states and, in
the absence of input, remains in that state. Thus, the flip-flop can
function as a 1-bit memory.
 The flip-flop has two outputs, which are always the complements of
each other.
 Types of Flip-Flops:

 S-R Flip-Flop

 Clocked S–R flip-flop

 The output of the S–R latch changes, after a brief time delay, in
response to a change in the input.
 This is referred to as asynchronous operation. Events in the digital
computer are synchronized to a clock pulse, so that changes occur only
when a clock pulse occurs.
 The R and S inputs are passed to the NOR gates only during the clock
pulse.

 D flip-flop
 One problem with S–R flip-flop is that the condition R = 1,S = 1 must
be avoided.
 One way to do this is to allow just a single input. The D flip-flop
accomplishes this by using an inverter, the non-clock inputs to the two
AND gates are guaranteed to be the opposite of each other.
 The D flip-flop is sometimes referred to as the data flip-flop because it
is, in effect, storage for one bit of data.
 The output of the D flip-flop is always equal to the most recent value
applied to the input. Hence, it remembers and produces the last input.
 It is also referred to as the delay flip-flop, because it delays a 0 or 1
applied to its input for a single clock pulse.

 D flip-flop

 J–K flip-flop


 Registers:
 A register is a group of flip-flops with each flip-flop capable of storing
one bit of information.
 An n-bit register has a group of n flip-flop and is capable of storing any
binary information of n bits. In addition to the flip-flops , a register may
have combinational gates that perform certain data processing tasks
 The flip-flops hold the binary information and the gates control when
and how new information is transferred into the register
 Various types of registers are available. The simplest register is one that
consists only of flip-flops, with no external gates.
 For example the following figure shows such a register constructed with
four D flip-flops.

 Registers:
 A parallel register consists of a set of 1-bit memories that can be read
or written simultaneously. It is used to store data.
 The 8-bit register of the Figure illustrates the operation of a parallel
register using D flip-flops. A control signal, labeled load, controls
writing into the register from signal lines, D11 through D18. These
lines might be the output of multiplexers, so that data from a variety of
sources can be loaded into the register.

 Registers
 A shift register accepts and/or transfers information serially. Data are
input only to the leftmost flip-flop. With each clock pulse, data are
shifted to the right one position, and the rightmost bit is transferred out.
 Shift registers can be used to interface to serial I/O devices. In addition,
they can be used within the ALU to perform logical shift and rotate
functions. In this latter capacity, they need to be equipped with parallel
read/write circuitry as well as serial.

 Counter:
 A register whose value is easily incremented by 1 modulo the capacity
of the register
 After the maximum value is achieved the next increment sets the
counter value to 0
 An example of a counter in the CPU is the program counter
 Can be designated as:
• Asynchronous
– Relatively slow because the output of one flip-flop triggers a change
in the status of the next flip-flop
• Synchronous
– All of the flip-flops change state at the same time
– Because it is faster it is the kind used in CPUs

Memory Units
 The memory unit is the working area of a computer system,

where the CPU stores the data and instructions.
 It is also known as a main/primary/internal memory.
 Instructions and data are held in main memory which is
divided into millions of addressable storage units called bytes.
 One byte can hold one character
 One byte can hold 8 bits
 Computers work by using pulses of voltage which represent
either 1 or 0
 A low voltage mean 0 and high voltage mean 1
 Total bytes in main memory referred to as the computer’s
memory size. SMU-Computer Science Department
Memory Units
 Bits:
 Computers use electronic circuits to perform the tasks they are
programmed to complete.
 These circuits can be in one of two states - ‘On’ or ‘Off’.
I nibble = 4 bits I byte = 8 bits
I kilobytes (kb) = 1024 bytes 1 Megabytes (Mb) = 1024kilobytes
1 gigabytes (Gb) = 1024Megabytes 1 terabytes (TB) = 1024Gigabytes
 Memory is used to hold the following information
 Programs, Input data, Working Area , Output data
 There are two types of main memory
 RAM (Random access memory )
 ROM (Read-only memory)

Memory Unit

+ Summary Digital
Logic
Chapter 1 & 3
 Introduction
 Organization vs Architecture  Combinational Circuits
 Components of Computer System  Implementation of Boolean
 Abstract Model of Modern Computers Functions
 Multiplexers
 Boolean Algebra
 Decoders
 Gates  Read-Only-Memory
 Adders
 Memory Units
 Sequential Circuits
 Bits
 Flip-Flops
 Types of Memory  Registers
SMU-Computer Science Department  Counters
Chapter 2 – Number System and Codes

The Decimal System
 System based on decimal digits (0, 1, 2, 3, 4, 5, 6, 7, 8, 9) to

represent numbers
 For example the number 83 means eight tens plus three:
83 = (8 * 10) + 3
 The number 4728 means four thousands, seven hundreds, two
tens, plus eight:
4728 = (4 * 1000) + (7 * 100) + (2 * 10) + 8
 The decimal system is said to have a base, or radix, of 10. This

means that each digit in the number is multiplied by 10 raised to
a power corresponding to that digit’s position:
83 = (8 * 101) + (3 * 100)
4728 = (4 * 103) + (7 * 102) + (2 * 101) + (8 * 100)
Decimal Fractions
 The same principle holds for decimal fractions, but negative

powers of 10 are used. Thus, the decimal fraction 0.256 stands for
2 tenths plus 5 hundredths plus 6 thousandths:
0.256 = (2 * 10-1) + (5 * 10-2) + (6 * 10-3)
 A number with both an integer and fractional part has digits raised
to both positive and negative powers of 10:
442.256 = (4 * 102) + (4 + 101) + (2 * 100) + (2 * 10-1) + (5 * 10-2)
+ (6 * 10-3)
 Most significant digit
 The leftmost digit (carries the highest value)
 Least significant digit
 The rightmost digit
Positional Number Systems
 Each number is represented by a string of digits in which

each digit position i has an associated weight ri, where r
is the radix, or base, of the number system.
 The general form of a number in such a system with
radix r is ( . . . a3a2a1a0.a-1a-2a-3 . . . )r
where the value of any digit ai is an integer in the range
0 < ai < r. The dot between a0 and a-1 is called the
radix point.

The Binary System
 Only two digits, 1 and 0

 Represented to the base 2
 The digits 1 and 0 in binary notation have the same meaning as in decimal notation:
02 = 010
12 = 110
 To represent larger numbers each digit in a binary number has a value depending on
its position:
102 = (1 * 21) + (0 * 20) = 210
112 = (1 * 21) + (1 * 20) = 310
1002 = (1 * 22) + (0 * 21) + (0 * 20) = 410
and so on. Again, fractional values are represented with negative powers of the radix:
1001.101 = 23 + 20 + 2-1 + 2-3 = 9.62510
+ Binary notation to
decimal notation:
Multiply each binary digit by
the appropriate power of 2
and add the results
Decimal notation to
binary notation:
Integer and fractional parts
are handled separately
Converting
Between Binary
and Decimal
For the integer part, recall that in binary notation, an integer represented by
bm-1bm-2 . . . b2b1b0 bi = 0 or 1
has the value Integers

(bm-1 * 2m-1) + (bm-2 * 2 m-2) + . . . + (b1 * 21) + b0
Suppose it is required to convert a decimal integer N into binary form. If we divide N by 2, in

the decimal system, and obtain a quotient N1 and a remainder R 0, we may write
N = 2 * N1 + R0 R0 = 0 or 1
Next, we divide the quotient N1 by 2. Assume that the new quotient is N2 and the new
remainder R1. Then
N1 = 2 * N2 + R1 R1 = 0 or 1
so that
N = 2(2N2 + R1) + R0 = (N2 * 22) + (R1 * 21) + R0

+
If next
N2 = 2N3 + R2
we have
Continued . . .
N = (N3 * 23) + (R2 * 22) + (R1 * 21) + R0
Integers
Because N >N1 > N2 . . . , continuing this sequence will
eventually produce a quotient Nm-1 = 1 (except for the
decimal integers 0 and 1, whose binary equivalents are 0 and
1, respectively) and a remainder Rm-2, which is 0 or 1. Then
N = (1 * 2m-1) + (Rm-2 * 2m-2) + . . . + (R2 * 22) + (R1 * 21) + R0
which is the binary form of N. Hence, we convert from base

10 to base 2 by repeated divisions by 2. The remainders and
the final quotient, 1, give us, in order of increasing
significance, the binary digits of N.
+

For the fractional part, recall that in binary notation, a
number with a value between 0 and 1 is represented by
Fractions
0.b-1b-2b-3 . . . bi = 0 or 1
and has the value
(b-1 * 2-1) + (b-2 * 2-2) + (b-3 * 2-3) . . .
This can be rewritten as
2-1 * (b-1 + 2-1 * (b-2 + 2-1 * (b-3 + . . . ) . . . ))
Suppose we want to convert the number F (0
< F < 1) from decimal to binary notation. We
know that F can be expressed in the form
+
F = 2-1 * (b-1 + 2-1 * (b-2 + 2-1 * (b-3 + . . . ) . . . ))
If we multiply F by 2, we obtain,
2 * F = b-1 + 2-1 * (b-2 + 2-1 * (b-3 + . . . ) . . . )
Continued . . .
From this equation, we see that the integer part of (2 * F),
which must be either 0 or 1 because 0 < F < 1, is Fractions
simply b-1. So we can say (2 * F) = b-1 + F1, where 0 < F1
< 1 and where
F1 = 2-1 * (b-2 + 2-1 * (b-3 + 2-1 * (b-4 + . . . ) . . . ))
To find b−2, we repeat the process.

At each step, the fractional part of the number from the
previous step is multiplied by 2. The digit to the left of
the decimal point in the
product will be 0 or 1 and contributes to the binary
representation, starting with the
+most significant digit. The fractional part of the product is
used as the multiplicand
in the next step.

Figure 9.2
Examples of
Converting
from
Decimal Notation
To
Binary Notation
For Fractions

+
Hexadecimal Notation
 Binary digits are grouped into sets of four bits, called a nibble
 Each possible combination of four binary digits is given a symbol, as follows:
0000 = 0 0100 = 4 1000 = 8 1100 = C

0001 = 1 0101 = 5 1001 = 9 1101 = D
0010 = 2 0110 = 6 1010 = A 1110 = E
0011 = 3 0111 = 7 1011 = B 1111 = F
 Because 16 symbols are used, the notation is called hexadecimal and the 16
symbols are the hexadecimal digits
 Thus
2C16 = (216 * 161) + (C16 * 160)
= (210 * 161) + (1210 * 160) = 44

+
Decimal, Binary,
and Hexadecimal

Hexadecimal Notation
Not only used for

representing integers but
also as a concise notation for
representing any sequence
of binary digits Reasons for using
hexadecimal notation are:
In most computers, binary

data occupy some multiple It is extremely easy to
It is more compact than
of 4 bits, and hence some convert between binary and
binary notation
multiple of a single hexadecimal notation
hexadecimal digit

Integer Representation
 In the binary number system arbitrary numbers can be

represented with:
 The digits zero and one
 The minus sign (for negative numbers)
 The period, or radix point (for numbers with a fractional
component)
 For purposes of computer storage and processing we do not have the

benefit of special symbols for the minus sign and radix point
 Only binary digits (0,1) may be used to represent numbers

Sign-Magnitude Representation
• All of these alternatives involve treating the

There are several alternative most significant (leftmost) bit in the word as a
conventions used to represent sign bit
• If the sign bit is 0 the number is positive
negative as well as positive integers
• If the sign bit is 1 the number is negative
Sign-magnitude representation is
the simplest form that employs a
sign bit
• Addition and subtraction require a

consideration of both the signs of the
Drawbacks: numbers and their relative magnitudes to
carry out the required operation
• There are two representations of 0
Because of these drawbacks, sign-

magnitude representation is rarely
used in implementing the integer
portion of the ALU

Characteristics of Two’s Complement Representation and
Arithmetic

Alternative Representations for 4-Bit Integers

Range Extension
 Range of numbers that can be expressed is extended by increasing the

bit length
 In sign-magnitude notation this is accomplished by moving the sign

bit to the new leftmost position and fill in with zeros
 This procedure will not work for twos complement negative integers
 Rule is to move the sign bit to the new leftmost position and fill
in with copies of the sign bit
 For positive numbers, fill in with zeros, and for negative
numbers, fill in with ones
 This is called sign extension

Fixed-Point Representation
Programmer can use the

The radix point (binary point) same representation for
is fixed and assumed to be to binary fractions by scaling the
the right of the rightmost numbers so that the binary
digit point is implicitly positioned
at some other location

Negation
 Twos complement operation

 Take the Boolean complement of each bit of the integer
(including the sign bit)
 Treating the result as an unsigned binary integer, add 1
+18 = 00010010 (twos complement)
bitwise complement = 11101101
+ 1
11101110 = -18
 The negative of the negative of that

-18number is itself:
= 11101110 (twos complement)
bitwise complement = 00010001
+ 1
00010010 = +18
Negation Special Case 1

Negation Special Case 2
-128 = 10000000 (twos complement)

Bitwise complement = 01111111
Add 1 to LSB + 1
Result 10000000
So:
-(-128) = -128 X
Monitor MSB (sign bit)
It should change during negation

Overflow
OVERFLOW RULE:
If two numbers are added,

Rule
and they are both positive or
both negative, then overflow
+ occurs if and only if the result
has the opposite sign.

Subtraction
SUBTRACTION RULE:
To subtract one number

(subtrahend) from another Rule
(minuend), take the twos

+
complement (negation) of
the subtrahend and add it
to the minuend.
+
Floating-Point Representation
Principles
 With a fixed-point notation it is possible to represent a range of
positive and negative integers centered on or near 0
 By assuming a fixed binary or radix point, this format allows the

representation of numbers with a fractional component as well
 Limitations:
 Very large numbers cannot be represented nor can very small fractions
 The fractional part of the quotient in a division of two large numbers could
be lost

+
Floating-Point
Significand
 The final portion of the word
 Any floating-point number can be expressed in many ways
The following are equivalent, where the significand is expressed

in binary form:
0.110 * 25
110 * 22
0.0110 * 26
 Normal number
 The most significant digit of the significand is nonzero
+ Additional Formats
Extended Precision Formats

Extendable Precision Format
 Provide additional bits in the exponent
(extended range) and in the significand
(extended precision)  Precision and range are defined under
user control
 Lessens the chance of a final result that has
been contaminated by excessive roundoff  May be used for intermediate
error calculations but the standard places no
constraint or format or length
 Lessens the chance of an intermediate
overflow aborting a computation whose final
result would have been representable in a
basic format
 Affords some of the benefits of a larger basic

format without incurring the time penalty
usually associated with higher precision

Chapter 4 – Register Transfer Language and

Micro Operations
Registers
 Within the processor, there is a set of registers that function as

a level of memory above main memory and cache
 The registers in the processor perform two roles:
 Enable the machine- or assembly language programmer to minimize
main memory references by optimizing use of registers
 Control the operation of the processor and by privileged, operating
system programs to control the execution of programs
 A register is a group of flip-flops. Each flip–flop is capable of
storing one bit of information.
 An n-bit register consists of a group of n flip-flops capable of storing n
bits of binary information.
 The flip-flops hold the binary information and the gates
determine how the information is transferred into the register
Registers
 Examples of Registers:
 The register that holds an address for the memory unit is called a
memory address register (MAR or AR).
 PC (for program counter), IR (for instruction register) and R1 (for
processor register).
 The individual flip-flops in an n-bit register are numbered in
sequence from 0 through n-1, starting from 0 in the rightmost
position and increasing the numbers toward the left.
 A 16-bit register is partitioned into two parts. L (for low byte) H
(for high byte).

Register Transfer Language
 The symbolic notation used to describe the micro operation

transfers among register is called a register transfer language.
 A programming language is a procedure for writing symbols
to specify a given computational process.
 A register transfer language is a system for expressing in
symbolic form the micro operation sequences among the
register of a digital module
 Information transfer from one register to another is designated
in symbolic form by means of a replacement operator.

 The statement R2 ← R1 denotes a transfer of the content of

register R1 into register R2.
 It designates a replacement of the content of R2 by the content
of R1. the content of the source register R1 does not change
after the transfer.
 Normally, we want transfer occur only under a predetermined
control condition.
 This can be shown by means of an (if-then) statement. If (P = 1) then
(R2 ← R1), where P is a control signal generated in the control section
 A control function is a Boolean variable that is equal to 1 or 0.
The control function is included in the statement as follows:
 P: R2 ← R1
 Example: T: R2 ← R1, R1 ← R2
 This statement denotes an operation that exchanges the contents of two
registers during one common Clock pulse provided that T = 1.

Bus Organization and Transfer
 The CPU communicates with the other components via a bus.

 Bus:
 A set of Wires (multiplexers) that acts as a shared but common data
path to connect multiple subsystems within the system
 Consists of multiple lines, allowing the parallel movement of bits
 Buses are low cost but very versatile, and they make it easy to connect
new devices to each other and to the system.
 At any one time, only one device (be it a register, the ALU,
memory, or some other component) may use the bus.
 However, this sharing often results in a communications bottleneck.
 The speed of the bus is affected by its length as well as by the
number of devices sharing it.
 Common Bus system configuration

 A bus structure consists of a set of common lines, one for each bit of a
register, through which binary information is transferred one at a time.
 The efficient scheme for transferring information between common bus
registers in a multiple-register configuration is a common bus system
 Control signals determine which register is selected by the bus during
each particular register transfer.
 Constructing a common bus system
• Using multiplexers
• Using three state buffers
 Using Multiplexers
 The multiplexers select the source register whose binary information is
then placed on the bus.
 Using Multiplexers
 Each register has four bits, bus numbered consists of 0 through 3.
 The four 4 x 1 multiplexers each having four data inputs, 0 through 3,
and two selection inputs, S1 and S0.
• In order not to complicate the diagram with 16 lines crossing each other,
we use labels to show the connections from the outputs of the registers to
the inputs of the multiplexers.
• For example, output 1 of register A is connected to input 0 of MUX 1
because this input is labeled A1. The diagram shows that the bits in the
same significant position in each register are connected to the data inputs
of one multiplexer to form one line of the bus.
• Thus MUX 0 multiplexes the four 0 bits of the registers, MUX 1
multiplexes the four 1 bits of the registers, and similarly for the other two
bits.
 The two selection lines S0 and S1 are connected to the selection inputs
of all four multiplexers.

 The selection lines choose the four bits of one register and
transfer them into the four-line common bus.
 When S1S0 = 00, the 0 data inputs of all four multiplexers are
selected and applied to the outputs that form the bus.
 This causes the bus lines to receive the content of register A
since the outputs of this register are connected to the 0 data
inputs of the multiplexers.
 Similarly, register B is selected if S1S0 = 01, and so on.

 Using Three-State Bus Buffers

 A bus system can be constructed with three-state gates instead of multiplexers
 A three-state gate is a digital circuit that exhibits three states.
• Two of the states are signals equivalent to logic 1 & 0 as in a conventional gate
• The third state is a high-impedance state. The high-impedance state behaves like
an open circuit, which means that the output is disconnected and does not have a
logic significance.
 Three-state gates may perform any conventional logic, such as AND/NAND
• The one most commonly used in the design of a bus system is the buffer gate.
 The control input determines the output state.

 When the control input SMU-Computer
is equal toScience
1, the output is enabled and the gate
Department
 When the control input is 0, the output is disabled and the gate goes to
a high-impedance state, regardless of the value in the normal input.
 The high-impedance state of a three-state gate provides a special
feature not available in other gates. Because of this feature, a large
number of three-state gate outputs can be connected with wires to form
a common bus line without endangering loading effects.
 The construction of a bus system with three-state buffers

 The outputs of four buffers are connected together to form a single bus line
 The control inputs to the buffers determine which of the four normal inputs
will communicate with the bus line.
 No more than one buffer may be in the active state at any given time.
• The connected buffers must be controlled so that only one three-state buffer has
access the bus line while other buffers are maintained in a high impedance state
 One way to ensure that no more than one control input is active at any
given time is to use a decoder, as shown in the diagram.
• When the enable input of the decoder is 0, all of its four outputs are 0, and the
bus line is in a high-impedance state because all four buffers are disabled.
 When the enable input is active, one of the three-state buffers will be active,
depending on the binary value in the select inputs of the decoder.

Memory Transfer
 The transfer of information from a memory word to the

outside environment is called a read operation. The transfer of
new information to be stored into the memory is called a write
operation.
 A memory word will be symbolized by the letter M. The
particular memory word among the many available is selected
by the memory address during the transfer.
 It is necessary to specify the address of M when writing
memory transfer operations. This will be done by enclosing
the address in square brackets following the letter M.
 Consider a memory unit that receives the address from a
register, called the address register, symbolized by AR .
Memory Transfer
 The data are transferred to another register, called the data

register, symbolized by DR . The read operation can be stated
as follows: Read: DR ← M[AR]
 This causes a transfer of information into DR from the
memory word M selected by the address in AR .
 The write operation transfers the content of a data register to a
memory word M selected by the address. Assume that the
input data are in register R1 R3 ← R1 + R2 + 1. R2 is the
symbol for the 1's complement of R2.
 Adding 1 to the 1's complement produces the 2’s complement.
Adding the contents of R1 to the 2's complement of R2 is
equivalent to R1 - R2.
Memory Transfer and Arithmetic Operation
 The increment and decrement microoperations are symbolized by

plus-one and minus-one operations, respectively.
 These microoperations are implemented with a combinational circuit or
with a binary up-down counter.
 The arithmetic operations of multiply and divide are not listed

 These two operations are valid arithmetic operations but are not included in
the basic set of microoperations.
Memory Transfer and Arithmetic Operation
 The only place where these operations can be considered as

microoperations is in a digital system, where they are
implemented by means of a combinational circuit.
 In such a case, the signals that perform these operations propagate through
gates, and the result of the operation can be transferred into a destination
register by a clock pulse as soon as the output signal propagates through the
combinational circuit.
 In most computers, the multiplication operation is implemented with a
sequence of add and shift microoperations.
 Division is implemented with a sequence of subtract and shift
microoperations.
 To specify the hardware in such a case requires a list of statements that use
the basic microoperations of add, subtract, and shift

Arithmetic Operation
 Binary Adder
 Registers are used to hold the data and the digital component that performs
arithmetic addition
 The digital circuit that generates the arithmetic sum of two binary numbers
of any length is called a binary adder.
 The digital circuit that forms the arithmetic sum of two bits and a previous
carry is called a full-adder.
 The binary adder is constructed with full-adder circuits connected in
cascade, with the output carry from one full-adder connected to the input
carry of the next full-adder.

 Binary Adder
 The augend bits of A and the addend bits of B are designated by subscript
numbers from right to left, with subscript 0 denoting the low-order bit. The
carries are connected in a chain through the full-adders.
 The input carry to the binary adder is C0 and the output carry is C4. The S
outputs of the full-adders generate the required sum bits.
 An n-bit binary adder requires n full-adders. The output carry from each
full-adder is connected to the input carry of the next-high-order full-adder.
 The n data bits for the A inputs come from one register (such as R1), and
the n data bits for the B inputs come from another register (such as R2).
 The sum can be transferred to a third register or to one of the source
registers (R1 or R2), replacing its previous content.

 Binary Adder-Subtractor
 The subtraction of binary numbers can be done most conveniently by
means of complements.
• Subtraction of A-B can be done by taking the 2's complement of B & add it to A
• The 2's complement can be obtained by taking the 1's complement and adding
one to the least significant pair of bits.
• The 1's complement can be implemented with inverters and a one can be added
to the sum through the input carry.
 The addition and subtraction operations can be combined into one common
circuit by including an exclusive-OR gate with each full-adder.

 Binary Adder-Subtractor
 The mode input M controls the operation.
• When M=0 the circuit is an adder & when M=1 the circuit becomes a subtractor
• Each exclusive-OR gate receives input M and one of the inputs of B.
• When M = 0, we have B ⊕ 0 = B.
 The full-adders receive the value of B, the input carry is O, and the circuit
performs A plus B. When M = 1, we have B ⊕ 1 = B' and C0 = 1.
 The B inputs are all complemented and a 1 is added through the input carry.
 The circuit performs the operation A plus the 2's complement of B. For
unsigned numbers, this gives A - B if A ≥ B or the 2's complement of (B -
A) if A < B. For signed numbers, the result is A - B provided that there Is no
overflow.

 Binary Incrementor
 The increment microoperation adds one to a number in a register.
• If a 4-bit register has a binary value 0110, it will be 0111 after it is incremented
 This microoperation is easily implemented with a binary counter.
 Every time the count enable is active, the clock pulse transition increments
the content of the register by one.
 There may be occasions when the increment microoperation must be done
with a combinational circuit independent of a particular register.
• This can be accomplished by means of half-adders connected in cascade.

 Binary Incrementor
 One of the inputs to the least significant half-adder (HA) is connected to
logic-1 and the other input is connected to the least significant bit of the
number to be incremented.
 The output carry from one half-adder is connected to one of the inputs of
the next-higher-order half-adder. The circuit receives the four bits from A0
through A3. adds one to it, and generates the incremented output in S0
through S3.
 The output carry C4 will be 1 only after incrementing binary 1111. This also
causes outputs S0 through S3 to go to 0. The circuit of Fig. below can be
extended to an n-bit binary incrementor by extending the diagram to include
n half-adders.
 The least significant bit must have one input connected to logic-1. The other
inputs receive the number to be incremented or the carry from the previous
stage. SMU-Computer Science Department
 Arithmetic Circuit
 The basic component of an arithmetic circuit is the parallel adder.
• By controlling the data inputs to the adder, it is possible to obtain different types
of arithmetic operations.

4-bit Arithmetic Circuit

Logic Microoperations

Logic Microoperations

Hardware Implementation of Logic Circuit

Applications of Logic Microoperations






Shift Micro-operations

Shift Microoperations

Types of Shift

Types of Shift

Types of Shift

4 - bit Combinational Circuit Shifter

4 - bit Combinational Circuit Shifter

Arithmetic logical shift unit

4 - bit Arithmetic Logic Shift Unit



Ch1-4 COA

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Computer Organization and Architecture

Chapter 1 and 3 – Digital Logic and Digital Systems

 Computer Organization Vs Architecture

SMU-Computer Science Department

 A distinction is often made between computer architecture and

 The digital computer is a digital system that performs various

SMU-Computer Science Department

 Virtually all contemporary computer designs are based on the

 The central processing unit (CPU) contains an arithmetic and

SMU-Computer Science Department

 Classification by physical size, price, capacity, performance,

 Classification by the method of operation (processing)

SMU-Computer Science Department

 The basic elements of a digital computer must perform data

 By interconnecting large numbers of these fundamental

 Binary logic deals with binary variables and with operations

 Performs a basic logic function called inversion or

 The purpose of this gate to change one logic level

 Used in temperature control circuits

 Extensively used in control circuits

SMU-Computer Science Department

 Logic symbol of NOT gate:

 Truth Table: Example

SMU-Computer Science Department

 The OR gate is composed of two or more inputs and a single output

 Performs Logical addition

 The logical operation of the OR gate:

 Otherwise it is LOW (0)

 A plus (+) is used to show the OR operation

SMU-Computer Science Department

 The total number of combinations possible for a logical gate is always

 The system can be used in a home, office, etc.

SMU-Computer Science Department

 Algebraic Notation: Z= X+Y

 Logic symbol of OR gate:

SMU-Computer Science Department

 Performs logical multiplication

 The logical operation of the AND gate:

 Otherwise it is LOW (0).

 A dot (.) is used to show the AND operation.

 The total number of combinations possible for a logical gate is always

SMU-Computer Science Department

 The main AND gate application is in digital electronics and in data

 Automatic temperature-regulating circuits

 Freezer warning buzzer devices

SMU-Computer Science Department

 Algebraic Notation: Z= X*Y

 Logic symbol of AND gate:

 Truth Table: Example

SMU-Computer Science Department

 Using combination of logic gates, complex operation can be

 Some basic combinations of gates include:

SMU-Computer Science Department

 NAND gate in digital electronics serves as a universal gate

SMU-Computer Science Department

SMU-Computer Science Department

 Algebraic Notation: Z= (X*Y)’

 Logic symbol of NAND gate:

SMU-Computer Science Department

 The NOR gate in digital electronics is a combination of logical OR

 To sum up, the principle of the NOR gate is as follows…

SMU-Computer Science Department

 Multipliers: A binary multiplier is an electronic circuit used in digital

 Ripple carry adders: