FOURTH UNIT-FIRST HALF

(555 timer and its applications)

FOURTH SEMESTER ECE

S Batmavady
 555 timer introduction…
• 555 timer specifications:
1. The 555 timer is an 8 pin IC used with a supply voltage (Vs) in the range 4.5V to 15V (18V is the absolute
maximum)
2. Output current : 200 ma (maximum)
3. Compatible with TTl and CMOS Ics

• Signetics corporation first introduced 555 IC

• It is ued to produce accurate time delays or oscillations

• The external components should be selected properly so that the timing intervals can be made into several
minutes along with the frequencies exceeding several hundred kilohertz.
• The duty cycle of the timer is adjustable.
• It is called 555 timer because in its internal circuit, there are three 5Kohm resistors connected which act as
potential diveders.
Some applications of 555:
• Ramp generator
• Sawtooth generator
• For FSK generation
• PWM generation
• PPM generation
• Astable multivibrator
• Monostable mulivibrator
Pin configuration of 555
Functional Block Diagram of 555
 Working of 555 timer
• In the internal circuit, 555 timer mainly consists of two comparators, two
transistors, a flip-flop, a power amplifier and 3 resistors of 5 Kohms each used as
voltage dividers. The upper transistor is used as a buffer for impedance matching
Case (i) :
• When the voltage at pin 2(trigger voltage)falls below Vcc/3, output of lower
comparator(LC) is HIGH. Therefore, SET (S) input of the flip-flop is ‘1’ and when
the voltage at pin 5 (control voltage) exceeds the threshold voltage at pin 6,
output of upper comparator(UC) is LOW .Therefore, RESET input to flip-flop is ‘0’.
• Since, S=1 and R=0, SR flip-flop is SET. Therefore, ‘Q’ output is HIGH and Qbar
output is LOW. Since, Qbar output is connected to inverting power amplifier, final
output is inverted which is ‘1’ or HIGH
Case (ii) :
When the voltage at pin 2(trigger voltage)exceeds Vcc/3, output of
lower comparator(LC) is LOW. Therefore, SET (S) input of the flip-flop
is ‘0’ and when the voltage at pin 5 (control voltage) falls below the
threshold voltage at pin 6, output of upper comparator(UC) is
HIGH .Therefore, RESET input to flip-flop is ‘1’.
Since, S=0 and R=1, SR flip-flop is RESET. Therefore, ‘Q’ output is LOW
and Qbar output is HIGH. Since, Qbar output is connected to inverting
power amplifier, final output is inverted which is ‘0’ or LOW
ASTABLE MULTIVIBRATOR USING 555
TIMER
MONOSTABLE MULTIVIBRATOR USING
555
• Initially, when the output at pin 3 is low i.e. the circuit is in a stable state, the transistor is on and
capacitor- C is shorted to ground. When a negative pulse is applied to pin 2, the trigger input falls
below +1/3 VCC, the output of comparator goes high which resets the flip-flop and consequently
the transistor turns off and the output at pin 3 goes high. This is the transition of the output
from stable to quasi-stable state, as shown in figure. As the discharge transistor is cut­off, the
capacitor C begins charging toward +VCC through resistance RA with a time constant equal to RAC.
When the increasing capacitor voltage becomes slightly greater than +2/3 VCC, the output of
comparator 1 goes high, which sets the flip-flop. The transistor goes to saturation, thereby
discharging the capacitor C and the output of the timer goes low, as illustrated in figure.
• Thus the output returns back to stable state from quasi-stable state.
• The output of the Monostable Multivibrator remains low until a trigger pulse is again applied.
Then the cycle repeats. Trigger input, output voltage and capacitor voltage waveforms are shown
in figure.
• 
Linear Ramp Genetor
•  if a capacitor is charged from a voltage source through a resistor, an
exponential waveform is produced while charging of a capaci­tor from
a constant current source produces a ramp. This is the idea behind
the circuit. The circuit of a ramp generator using timer 555 is shown in
figure. Here ,thePNP transistor that produces a constant charging
current.
• Charging current produced by PNP constant current source is
• iC = Vcc-VE / RE
• where VE = R2 / (R1 + R2) * VCC + VBE
• When a trigger starts the monostable multivibrator timer 555 as
shown in figure, the PNP current source forces a constant charging
into the capacitor C. The voltage across the capacitor is, therefore, a
ramp as illustrated in the figure. The slope of the ramp is given as
• Slope, s = I/C
 FREQUENCY DIVIDER
• A continuously triggered monostable circuit when triggered by a
square wave generator can be used as a frequency divider, if the
timing interval is adjusted to be longer than the period of the
triggering square wave input signal.The monostable multivibrator will
be triggered by the first negative going edge of the square wave input
but the output will remain HIGH(because of greater timing interval)
for next negative going edge of the input square wave
• The simple frequency divider circuit is actually the basic circuit of a 555 in
monostable (one shot) mode. The frequency to be divided is applied to
trigger input (pin 2). The negative edge of the applied signal triggers the
timer and the C1 capacitor starts charging. During the charging process,
further incoming pulses have no effect. The capacitor charges to its
threshold value. Then, C1 discharges rapidly and the circuit waits in this
state to be triggered by the next incoming pulse.
• If R1 and C1 are chosen properly, the circuit can be made to trigger on
second, third, fourth or fifth or more pulses and the output will be a
frequency equal to the input frequency divided by that number.
 
Pulse Width Modulation (PWM)
• The 555 IC is wired in monostable mode of operation for PWM operation
• In this mode the output is LOW (0V) when there is no triggering, when it is triggered via 2nd pin
the output goes HIGH (Vcc) for some time. This time period is determined by the expression T=1.
11 RC  
• Trigger is applied via a differentiator circuit to make sharp pulses. The resistor of differentiator is
connected to Vcc to generate negative trigger pulses and the diode avoids positive spikes. And
now this output is modulated using the input voltage applied at the control pin of the IC. So
whenever the trigger pin pulses become low, the output of the IC switches to high and as a result
the discharge transistor (internal to the 555 IC attached to the 7th pin) is disabled.
• So C2 charges through R2.This capacitor keeps on charging until the voltage is above the input
control voltage, at which the IC changes its state. Now the output is low which makes the
discharge transistor activated thereby discharging the capacitor C2.
• Hence the output pulse width is determined by the control voltage. This process continues and we
get a continuous stream of pulses
Width of the pulses vary in accordance with the instantaneous amplitude of the modulating signal
Pulse Position Modulation(PPM)
• Here, the position of the pulses are varied in accordance with the
instantaneous amplitude of the modulating signal. Width of the plses
remain constant throughout.
Binary Frequency Shift Keying(BFSK)
  BinaryFrequency Shift Keying (BFSK) system, the carrier frequency is switched between two
frequencies according to the binary input. 
The 555 timer functions in astable mode. The frequency of operation is given by the expression

Fo = 1.45/(Ra+2Rb)
• The output frequency of the signal was based on the input digital signal given to the base of the
transistor.When the given input was high that is of logic 1 the PNP transistor was Q is off and IC 555 timer
works in the normal Astable mode of operation giving out the series of square wave pulses thus there will
be no change in the frequency of the output signal.Here the resistors Ra, Rb and Capacitor C was selected
in such a way to obtain output frequency of 1070Hz.The output frequency when the input was high was
given by the equation
•                                                   f= 1.45/(Ra + 2Rb)C
• When the input binary data if logic 0, the PNP transistor is on and its connects the resistance Rc across
resistance Ra.The resistors Rc is selected in such a way that the value of 1270Hz.Here the value of Rc
added in addition to the Ra, Rb and C to contribute the working of the  NE555.This makes the charging
and discharging quicker resulting in high frequency waves as output.The Ra, Rb, Rc and C values was
selected in such a way to obtain output frequency of 1270 Hz.This was given by the equation
•                                                  f=1.45/((Ra || Rc)+ 2Rb)C
• Thus the resultant output FSK will give frequency of 1070Hz when input is high and frequency of 1270
when input is low.Thus by this way the FSK signal was obtained using NE555.
If the resistor Ra varies, the frequency varies. When the input is at logic 1, the transistor turn ON and effectively
resistance of Ra decreases, because transistor
offers a resistance of a few ohms in parallel to Ra. This makes the frequency of operation less. The potentiometer Ra is
used to fine tune the frequency.
When the input is at logic 1, frequency of operation is given by the expression

  Fo = 1.45/(Ra//R + 2Rb)