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Boolean Algebra

• Boolean Algebra is the mathematics we use to


analyze digital gates and circuits.
• We can use these “Laws of Boolean” to both
reduce and simplify a complex Boolean
expression in an attempt to reduce the
number of logic gates required.
Binary Addition
Binary addition
OR Gate
EXOR gate
Karnaugh Map
• Maurice Karnaugh, a telecommunications engineer,
developed the Karnaugh map at Bell Labs in 1953 while
designing digital logic based telephone switching circuits.
• The Use of Karnaugh Map
• Now that we have developed the Karnaugh map with the
aid of Venn diagrams, let’s put it to use.
• Karnaugh maps reduce logic functions more quickly and
easily compared to Boolean algebra.
• By reduce we mean simplify, reducing the number of gates
and inputs.
• We define lowest cost as being the lowest number of gates
with the lowest number of inputs per gate.
Kaurnaugh maps
Karnaugh Maps - Rules of Simplification

• No zeros allowed.
• No diagonals.
• Only power of 2 number of cells in each group.
• Groups should be as large as possible.
• Every one must be in at least one group.
• Overlapping allowed.
• Fewest number of groups possible.
• Groups may not include any cell containing
a zero
• Groups may be horizontal or vertical, but not
diagonal.
• Groups must contain 1, 2, 4, 8, or in general 2n cells.
That is if n = 1, a group will contain two 1's since 2 1 = 2.
If n = 2, a group will contain four 1's since 22 = 4.
• Each group should be as large as possible.
• Groups may overlap.
• There should be as few groups as possible, as long
as this does not contradict any of the previous
rules.
A’B’C+ A’BC+ A’BC’+AB’C’+AB’C+ABC’
• We need to apply rules for simplifying K-Map that we
read in last tutorial.. There are 3 pairs circled in red.
• (1,3) – A’C
• (2,6) – BC’
• (4, 5) – AB’
• Thus, F = A’C + BC’ + AB’
Half Adder
Half Adder
Half Adder
Half Adder
Full Adder

• Full Adder-

• Full Adder is a combinational logic circuit.


• It is used for the purpose of adding two single bit
numbers with a carry.
• Thus, full adder has the ability to perform the addition
of three bits.
• Full adder contains 3 inputs and 2 outputs (sum and
carry) as shown
Half Subtractor
Half Subtractor using Nand Gate

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