DC

Chapter
4

Biasing of
BJTs
PRESENTER:
INSTRUCTOR:
JOHN CARL G. ENGR. EUGENE
MORILLO BARBONIO
BSECE-2C
Objectives

To understand the concept of biasing and its importance in

the operation of a BJT.

To understand the concept of DC operating point and its

significance in BJT transistor design.

To understand the fixed-bias circuit and its analysis.

To understand the concept of transistor saturation. To learn

about load-line analysis
Table of contents

01 02 03
Introduction Operating Fixed-Bias
Point Circuit

04 05 06
Forward Bias Collector– Transistor
of Base– Emitter Loop Saturation and
Emitter Load-Line
Analysis
 Introduction

The dc and ac response are necessary to the

analysis of a transistor amplifier.

The amplified output ac power is the result of a

transfer of energy from the applied dc supplies.
This is the processing of transferring a current from
a low to high resistance:
transfer + resistor → transistor
The superposition theorem is applicable and the
investigation of the dc conditions can be totally
separated from the ac response.
However, while designing, the selection of
parameters for the required dc level will affect
the ac response and vice versa.

So the first step of designing is to chose a

suitable operating point.
Then a network must be constructed that will
establish the desired
Some important basicoperating point.in the
relationships
analysis:
VBE = 0.7V

IE

= (β+1)IB  IC IC

= βIB
 Operating Point
The operating point is a fixed point on the
characteristics and is also called quiescent point,
denoted by Q-point.
The term biasing means the application of dc voltages used
to setup a fixed level of current and voltage.
This leads to an operating point in the region of
characteristics employed for amplification.
 B

Figure 4.1: Operating points

The figure shows a general output device
characteristic.
The maximum ratings are indicated:
B
 The maximum collector current ICmax D

C
 The maximum collector-to-emitter
voltage VCEmax A

 The maximum power constraint defined by the

Figure 4.1: Operating points
curve Pcmax

 The cutoff region, defined by IB  0A

 The saturation region, defined by VCE  VCE SAT

The biasing circuit can be designed to set the device
operation at any point within the active region.
Or, the lifetime of device would be shortened or the
device would be damaged.
B
The chosen Q-point often depends on the intended use of D
the circuit.
C

Some basic ideas about the operating point: A

 No bias(A):
Figure 4.1: Operating points
The device would initially be completely off and zero
current through the device and zero voltage across it.
This leads to that only part of the input signal is
applied to the circuit.
So this point is not suitable.
 Small-voltage biasing(C):
This point would allow some positive and
negative variation of the output signal.
B
But the peak-to-peak value would be limited D
by the proximity of VCE = 0 and IC = 0.
C

Operating at this point raises some concern A

about the nonlinearities introduced by rapid
changing spacing between IB curves.
Figure 4.1: Operating points
It is preferable to operate where the gain of the
device is fairly constant to ensure that the
amplification over the entire swing of input
signal is the same.
 Large-voltage biasing(D):
The operating point is shown in the figure.
Operating point is near the maximum voltage and power
level.
The output voltage swing in the positive direction is thus B
limited. D

 Acceptable biasing(B): C

If a signal is applied to the circuit, the device will vary A

in current and voltage from the operating point.
Then the device react to both the positive and negative Figure 4.1: Operating points
excursions of the input signal.
The voltage and current will vary but not enough to
drive the device into cutoff or saturation region.
It is also in the region of more linear spacing and
therefore more linear operation.
Therefore, this point is the optimal operating B
D
point in terms of linear gain and largest possible
C
voltage and current swing.
A
This is usually the desired condition for small-
signal amplifier but not for power amplifier.
The latter will be covered in chapter 11. Figure 4.1: Operating points
 For the BJT to be biased in its linear or
active operating region, the following must
be true:
 The b-e junction must be forward-biased
with a resulting forward-bias voltage of
about 0.6 to 0.7 V.
 The b-c junction must be reversed-biased
with reversed-bias voltage being any value
within the maximum limits of the device.
 Fixed-Bias
The fixed-bias circuit is the Circuit
simplest transistor dc bias
configuration, as shown in the figure (npn transistor).

Even though npn transistor is employed, the analysis

is also valid to pnp transistor if current directions and
voltage polarities are changed.

For the dc analysis, the network can be isolated

from the ac levels by replacing each capacitor with
an open circuit.

Also the dc supply VCC can be separated into two

supplies to permit a separation of input and output
circuits.

All these are for analysis purpose only.

 Base-Emitter Loop
Consider first the base-emitter circuit loop. It’s obvious
that:
VCC = IB RB + VBE
So, we get the equation for current IB :

The supply voltage VCC is a constant, which is chosen

in advance.
Also the b-e voltage VBE is a constant, which is
approximately equal to 0.7V while in forward-
biasing.

So the selection of a base resistor RB sets the level of base

current for the operating point.
 Collector-Emitter Loop
The collector-emitter loop is shown in the figure.
The magnitude of the collector current is related
directly to IB through
IC = β IB
Note that:
 IB is controlled by the level of RB.
 IC is related to IB by a constant β.
 The magnitude of IC is not a function of the resistance
RC .

 Changing RC to any level will not affect IC or IB as

long as the device remains in the active region.

 However, RC will determine the magnitude of VCE ,

which will affect the position of Q-point.
The magnitude of VCE is obtained by

VCE = VCC - IC RC
This states that the voltage across collector-emitter
of a transistor is the supply voltage less the drop
across RC.
Example 4.1:
Determine the following for the fixed-bias configuration.
1. IBQ , ICQ and VCEQ.
2.VB , VC and VBC .
Solution:
 2. VB = VBE = 0.7V

VC = VCE = 6.83V

VBC = VB – VC

= 0.7V – 6.83V = -6.13V

The negative voltage means that the junction is reverse-

biased, as it should be for linear amplification.
 Transistor Saturation
 Saturation conditions are normally avoided
because the base-collector junction is no longer
reverse biased and the output amplified signal
will be distorted

 For a transistor operating in the saturation

region, the current is a maximum value for the
particular design. Change the design and the
corresponding saturation level may rise or drop

 If we approximate the curves of Fig. 4.8(a) by

those appearing in Fig. 4.8(b), a quick, direct
method for determining the saturation level
becomes apparent. In Fig. 4.8b, the current is
relatively high and the voltage Vce is assumed to
be zero volts. Applying Ohm’s law the resistance
between collector and emitter terminals can be
determined as follows
  When the transistor is operating in saturation,
current through the transistor is at its maximum
possible value.

Example 4.2:
Determine the saturation level for the network.
Solution:
 Load-Line Analysis
Now we investigate how the network parameters
define the possible range of Q-points and how the
actual Q-point is determined.
The network is shown in the figure.
An output equation relates the variables IC
and VCE in the following manner:
Figure: Biasing of a network
VCE =VCC - IC RC
It is obvious that the relationship between variables
IC and VCE is a linear one, i.e., a straight line.

On the other hand, the output characteristics of the

transistor also relate the same two variables IC and VCE ,
as shown in the figure.

So the solution of Q-point should satisfy both of the

relationships simultaneously. Figure: the device characteristics
It is obvious that the relationship between
variables IC and VCE is a linear one, i.e., a
straight line.

On the other hand, the output characteristics of

the transistor also relate the same two variables IC
and VCE , as shown in the figure.
Figure: the device characteristics
So the solution of Q-point should satisfy both of
the relationships simultaneously.
The output characteristics is ready here.

Then, for straight line, two points are sufficient to

determine it. For the first point:

mA
So the first point is (VCC ,0). For the other point :

So the second point is (0, VCC /R ).

From the two points, we get the straight line.

The straight line is called a load line because

the intersection on the vertical axis is
defined by the applied load resistor RC.

By solving for the resulting level of IB,

we can establish the actual Q-point.
 IB increasing
If the level of IB is changed by VCC/RC
varying the value of RB, the Q-
point moves up or down the load
line as shown in the figure.

VCC
Figure: Q-point moves as changing of RB .
 VCC/RC1
RC1< RC2 <RC3
If RC changed while VCC and
VCC/RC2 Constant IB
IB are held, the load line
will shift as shown in the
VCC/RC3
figure.

VCC
Figure: Load line shifts as changing of RC .
 VCC1/RC
VCC3< VCC2 <VCC1
If RC is fixed and VCC varied, VCC2/RC Constant IB
the load line will shift as
shown in the figure. VCC3/RC

VCC3 VCC2
VCC1
Figure: Load line shifts as changing of VCC .
 Example 4.3
As shown in the figure, given the load line and the
defined Q-point, determine the required values of
VCC , RC and RB for a fixed-bias configuration.
Solution:
From the figure, we can get that:

VCE = VCC = 20V at IC = 0 mA

END OF THE TOPIC

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