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Basic Computer Architecture Overview

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Basic Computer Architecture Overview

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Samer elkheder
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COMPUTER

ARCHITECTURE
Rolando Del Cairo
© 2003 Baker Hughes Incorporated All rights reserved.
Computer architecture

 Is the study of the components that


make up computer systems and how
they are interconnected

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Basic Computer Architecture

 The main components in a typical


computer system are the
– processor
– memory
– input/output devices
– and the communication channels that
connect them.

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Basic Computer Architecture
 The processor
– is the workhorse of the system; it is the
component that executes a program by
performing arithmetic and logical
operations on data.
– It is the only component that creates
new information by combining or
modifying current information.
– In a typical system there will be only
one processor, known at the central
processing unit, or CPU.

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Basic Computer Architecture
 Memory
– is a passive component that simply
stores information until it is requested
by another part of the system.
– During normal operations it feeds
instructions and data to the processor,
and at other times it is the source or
destination of data transferred by I/O
devices.
– Information in a memory is accessed
by its address.

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Basic Computer Architecture

 Input/output (I/O) devices


– transfer information without altering it
between the external world and one or
more internal components.
– I/O devices can be secondary
memories, for example disks and tapes,
or devices used to communicate
directly with users, such as video
displays, keyboards, and mouses.

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Basic Computer Architecture

 The communication channels


– that tie the system together can either
be simple links that connect two
devices or more complex switches that
interconnect several components and
allow any two of them to communicate
at a given point in time.

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Basic Computer Architecture

 Processors
– The operation of a processor is
characterized by a fetch-decode-
execute cycle.
• In the first phase of the cycle, the
processor fetches an instruction from
memory.
• In the decode phase the processor stores
the information returned by the memory in
another internal register, known as the
instruction register, or IR.

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Basic Computer Architecture

 Processors
• In the execution stage the processor
actually carries out the instruction.
• Instructions can be classified as one of
three major types: arithmetic/logic, data
transfer, and control.
• Arithmetic and logic instructions apply
primitive functions of one or two
arguments, for example addition,
multiplication, or logical AND.

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Basic Computer Architecture
 Chipsets
– Chipsets provide the support for the
processor chip on the motherboard.
• The Intel 440BX is the dominant chipset in
the non-Apple personal computers.
– The chipset is the heart of the
computer since it controls and
determines how fast and which type of
processor, memory, and slots are used.
– Another chip on the motherboard is
called the Super I/O controller.

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Input-Output Organization

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Basic Computer Architecture
Name Date Transistors Microns Clock speed Data width MIPS

8080 1974 6,000 6 2 MHz 8 bits 0.64

16 bits
8088 1979 29,000 3 5 MHz 0.33
8-bit bus

80286 1982 134,000 1.5 6 MHz 16 bits 1

80386 1985 275,000 1.5 16 MHz 32 bits 5

80486 1989 1,200,000 1 25 MHz 32 bits 20


32 bits
Pentium 1993 3,100,000 0.8 60 MHz 64-bit 100
bus
32 bits
Pentium II 1997 7,500,000 0.35 233 MHz 64-bit ~300
bus
32 bits
Pentium III 1999 9,500,000 0.25 450 MHz 64-bit ~510
bus
32 bits
Pentium 4 2000 42,000,000 0.18 1.5 GHz 64-bit ~1,700
bus
32 bits
Pentium 4
2004 125,000,000 0.09 3.6 GHz 64-bit ~7,000
"Prescott“
bus
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1971: 4004 Microprocessor

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2000: Intel® Pentium® 4 Processor

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Basic Computer Architecture

 Memories
– Memories are characterized by their
function, capacity, and response times.
– Operations on memories are called
reads and writes, defined from the
perspective of a processor or other
device that uses a memory: a read
transfers information from the memory
to the other device, and a write
transfers information into the memory.

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Basic Computer Architecture
– A memory that performs both reads
and writes is often just called a RAM,
for random access memory.
– Other types of memories commonly
used in systems are read-only memory,
or ROM,
.
– and programmable read-only memory,
or PROM
• (information in a ROM is set when the
chips are designed; information in a PROM
can be written later, one time only, usually
just before the chips are inserted into the
system).

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Basic Computer Architecture

– The smallest unit of information is a


single bit, which can have one of two
values.
– The capacity of an individual memory
chip is often given in terms of bits. For
example one might have a memory
built from 64Kb (64 kilobit) chips.
– When discussing the capacity of an
entire memory system, however, the
preferred unit is a byte, which is
commonly accepted to be 8 bits of
information.
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Basic Computer Architecture

– Memory sizes in modern systems range


from 4MB (megabytes) in small
personal computers up to several
billion bytes (gigabytes, or GB) in large
high-performance systems.
• Note the convention that lower case b is
the abbreviation for bit and upper case B is
the symbol for bytes.

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Basic Computer Architecture

– The following terminology is used


when discussing hierarchical
memories:
• The memory closest to the processor is
known as a cache.
– An instruction buffer is a special cache for
instructions that also performs other functions
that make fetching instructions more efficient.
• The main memory is known as the primary
memory.
• The low end of the hierarchy is the
secondary memory. It is often implemented
by a disk, which may or may not be
dedicated to this purpose.
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MEMORY
 There are several different types of
memory:
– RAM (random-access memory)
– ROM (read-only memory)
– PROM (programmable read-only
memory)
– EPROM (erasable programmable read-
only memory
– EEPROM (electrically erasable
programmable read-only memory)

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MEMORY

– RAM (random-access memory):


• This is the same as main memory. When
used by itself, the term RAM refers to read
and write memory; that is, you can both
write data into RAM and read data from
RAM.
• This is in contrast to ROM, which permits
you only to read data. Most RAM is
volatile, which means that it requires a
steady flow of electricity to maintain its
contents. As soon as the power is turned
off, whatever data was in RAM is lost.

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MEMORY

– ROM (read-only memory):


• Computers almost always contain a small
amount of read-only memory that holds
instructions for starting up the computer.
Unlike RAM, ROM cannot be written to.

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MEMORY

– PROM (programmable read-only


memory):
• A PROM is a memory chip on which you
can store a program.
• But once the PROM has been used, you
cannot wipe it clean and use it to store
something else.
• Like ROMs, PROMs are non-volatile.

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MEMORY

– EPROM (erasable programmable read-


only memory):
• An EPROM is a special type of PROM that
can be erased by exposing it to ultraviolet
light.
– EEPROM (electrically erasable
programmable read-only memory):
• An EEPROM is a special type of PROM that
can be erased by exposing it to an
electrical charge

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MEMORY
 RAM
– a type of computer memory that can be
accessed randomly; that is, any byte of
memory can be accessed without
touching the preceding bytes. RAM is
the most common type of memory
found in computers and other devices,
such as printers. There are two basic
types of RAM:
• dynamic RAM (DRAM)
• static RAM (SRAM)

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MEMORY

– dynamic RAM (DRAM)


– Dynamic RAM needs to be refreshed thousands
of times per second.
– static RAM (SRAM)
– Static RAM does not need to be refreshed,
which makes it faster; but it is also more
expensive than dynamic RAM.
• The two types differ in the technology they
use to hold data, dynamic RAM being the
more common type.
• Both types of RAM are volatile, meaning
that they lose their contents when the
power is turned off.

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MEMORY

 DRAM
– stands for dynamic random access
memory, a type of memory used in
most personal computers.

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MEMORY

 SDRAM
– Short for Synchronous DRAM, a type of
DRAM that can run at much higher
clock speeds than conventional
memory.
– SDRAM actually synchronizes itself
with the CPU's bus and is capable of
running at 133 MHz, about three times
faster than conventional FPM RAM, and
about twice as fast EDO DRAM and
BEDO DRAM. SDRAM is replacing EDO
DRAM in many newer computers.
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MEMORY

 DDR-SDRAM
– Short for Double Data Rate-
Synchronous DRAM, a type of SDRAM
that supports data transfers on both
edges of each clock cycle (the rising
and falling edges), effectively doubling
the memory chip's data throughput.
– DDR-SDRAM also consumes less
power, which makes it well-suited to
notebook computers. DDR-SDRAM is
also called SDRAM II. and DDRAM.

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Basic Computer Architecture

 BUS
– Is a set of parallel conductors, which
allow devices attached to it to
communicate with the CPU.
• The bus consists of three main parts:
– Control lines
– Address lines
– Data lines

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Basic Computer Architecture

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Basic Computer Architecture

– Control lines
• These allow the CPU to control which
operations the devices attached should
perform, I.E. read or write.
– Address lines
• Allows the CPU to reference certain
(Memory) locations within the device.
– Data lines
• The meaningful data which is to be sent or
retrieved from a device is placed on to
these lines.

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Basic Computer Architecture

 Buses
– A bus is used to transfer information
between several different modules.
– Small and mid-range computer
systems, have a single bus connecting
all major components.
– Supercomputers and other high
performance machines have more
complex interconnections, but many
components will have internal buses.

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Basic Computer Architecture

– Communication on a bus is broken into


discrete transactions.
– Each transaction has a sender and
receiver.
– In order to initiate a transaction, a
module has to gain control of the bus
and become (temporarily, at least) the
bus master.

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Basic Computer Architecture

– Often several devices have the ability


to become the master.
– When two or more devices want to
transfer information at the same time,
an arbitration protocol is used to
decide which will be given control first.
– A protocol is a set of signals
exchanged between devices in order to
perform some task, in this case to
agree which device will become the bus
master.

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Basic Computer Architecture

– Once a device has control of the bus, it


uses a communication protocol to
transfer the information.
– The performance of a bus is defined by
two parameters, the transfer time and
the overall bandwidth (sometimes
called throughput).

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Basic Computer Architecture

– Transfer time is similar to latency in


memories: it is the amount of time it
takes for data to be delivered in a
single transaction.
• For example, the transfer time defines how
long a processor will have to wait when it
fetches an instruction from memory.

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Basic Computer Architecture

– Bandwidth, expressed in units of bits


per second (bps), measures the
capacity of the bus.
– It is defined to be the product of the
number of bits that can be transferred
in parallel in any one transaction by the
number of transactions that can occur
in one second.
• For example, if the bus has 32 data lines
and can deliver 1,000,000 packets per
second, it has a bandwidth of 32Mbps.

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Basic Computer Architecture

 I/O
– Many computational science
applications generate huge amounts of
data which must be transferred
between main memory and I/O devices
such as disk and tape.

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Basic Computer Architecture
 Operating Systems
– The user's view of a computer system
is of a complex set of services that are
provided by a combination of hardware
(the architecture and its organization)
and software (the operating system).
– The predominant operating systems for
workstations is Unix, developed in the
1970s at Bell Labs and made popular in
the 1980s by the University of
California at Berkeley.

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Basic Computer Architecture

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Input-Output Organization

 The Cache Bus:


– Higher-level architectures, such as
those used by the Pentium Pro and
Pentium II, employ a dedicated bus for
accessing the system cache.
• This is sometimes called a backside bus.
– Conventional processors using fifth-
generation motherboards and chipsets
have the cache connected to the
standard memory bus.

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Input-Output Organization

 The Memory Bus:


– This is a second-level system bus that
connects the memory subsystem to the
chipset and the processor.
– In some systems the processor and
memory buses are basically the same
thing.

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Input-Output Organization
 The Local I/O Bus:
– This is a high-speed input/output bus
used for connecting performance-
critical peripherals to the memory,
chipset, and processor.
– For example, video cards, disk storage
devices, high-speed networks
interfaces generally use a bus of this
sort.
– The two most common local I/O buses
are the VESA Local Bus (VLB) and the
Peripheral Component Interconnect
Bus (PCI).
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Input-Output Organization

 The Standard I/O Bus:


– Connecting to the above three buses is
the standard I/O bus, used for slower
peripherals (mice, modems, regular
sound cards, low-speed networking)
and also for compatibility with older
devices.
– On almost all modern PCs this is the
Industry Standard Architecture (ISA)
bus.

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Input-Output Organization

 ISA (Industry Standard Architecture)


– is a standard bus architecture that is
associated with the IBM AT
motherboard.
– It allows 16 bits at a time to flow
between the motherboard circuitry and
an expansion slot card and its
associated device(s).

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Input-Output Organization
 MCA (Micro Channel Architecture)
– was developed by IBM for its line of PS/2 desktop
computers, Micro Channel Architecture is an interface
between a computer (or multiple computers) and its
expansion cards and their associated devices.
– MCA was a distinct break from previous bus
architectures such as ISA.
– The pin connections in MCA are smaller than other bus
interfaces. For this and other reasons, MCA does not
support other bus architectures. Although MCA offers
a number of improvements over other bus
architectures, its proprietary, nonstandard aspects did
not encourage other manufacturers to adopt it. It has
influenced other bus designs and it is still in use in
PS/2s and in some minicomputer systems.

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Input-Output Organization
 EISA (Extended Industry Standard
Architecture)
– is a standard bus architecture that
extends the ISA standard to a 32-bit
interface.
– It was developed in part as an open
alternative to the proprietary Micro
Channel Architecture (MCA) that IBM
introduced in its PS/2 computers.
– EISA data transfer can reach a peak of
33 megabytes per second.

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Input-Output Organization
 VESA (Video Electronics Standards Association
Local Bus)
– Local Bus is a standard interface between your
computer and its expansion slots that provides faster
data flow between the devices controlled by the
expansion cards and your computer's microprocessor.
– A "local bus" is a physical path on which data flows at
almost the speed of the microprocessor, increasing
total system performance.
– VESA Local Bus is particularly effective in systems
with advanced video cards and supports 32-bit data
flow at 50 MHz.
– A VESA Local Bus is implemented by adding a
supplemental slot and card that aligns with and
augments an ISA expansion card.

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Input-Output Organization

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Input-Output Organization
 PCI (Peripheral Component Interconnect)
– is an interconnection system between a
microprocessor and attached devices in which
expansion slots are spaced closely for high speed
operation. Using PCI, a computer can support both new
PCI cards while continuing to support ISA expansion
cards.
– Designed by Intel, the original PCI was similar to the
VESA Local Bus. However, PCI 2.0 is no longer a local
bus and is designed to be independent of
microprocessor design.
– PCI is designed to be synchronized with the clock
speed of the microprocessor, in the range of 20 to 33
MHz. PCI is now installed on most new desktop
computers, not only those based on Intel's Pentium
processor but also those based on the PowerPC.

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Input-Output Organization

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Input-Output Organization

– PCI transmits 32 bits at a time in a 124-pin


connection (the extra pins are for power
supply and grounding) and 64 bits in a 188-pin
connection in an expanded implementation.
– PCI uses all active paths to transmit both
address and data signals, sending the
address on one clock cycle and data on the
next.
– Burst data can be sent starting with an
address on the first cycle and a sequence of
data transmissions on a certain number of
successive cycles.

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Input-Output Organization

Bus Type Bus Width Bus Speed MB/sec

ISA 16 bits 8 MHz 16 MBps

EISA 32 bits 8 MHz 32 MBps

VL-bus 32 bits 25 MHz 100 MBps

VL-bus 32 bits 33 MHz 132 MBps

PCI 32 bits 33 MHz 132 MBps

PCI 64 bits 33 MHz 264 MBps

PCI 64 bits 66 MHz 512 MBps

PCI-X 64 bits 133 MHz 1 GBps

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Input-Output Organization

 PCI-X
– PCI-X (Peripheral Component
Interconnect Extended) is a computer
bus technology (the "data pipes"
between parts of a computer) that
increases the speed that data can move
within a computer from 66 MHz to 133
MHz.
– The technology was developed jointly
by IBM, HP, and Compaq.

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Input-Output Organization
– PCI-X doubles the speed and amount of data
exchanged between the computer processor
and peripherals.
– With the current PCI design, one 64-bit bus
runs at 66 MHz and additional buses move 32
bits at 66 MHz or 64 bits at 33 MHz.
– The maximum amount of data exchanged
between the processor and peripherals using
the current PCI design is 532 MB per second.
– With PCI-X, one 64-bit bus runs at 133 MHz
with the rest running at 66 MHz, allowing for a
data exchange of 1.06 GB per second.

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Input-Output Organization

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Input-Output Organization
 Accelerated Graphics Port. AGP
– enables your computer to have a dedicated
way to communicate with the graphics card,
enhancing both the look and speed of your
computer's graphics. AGP
– is based on the design of the PCI bus; but
unlike a bus, it provides a dedicated point-to-
point connection from the graphics card to
the CPU.
– With a clear path to the CPU and system
memory, AGP provides a much faster, more
efficient way for your computer to get the
information it needs to render complex
graphics. In the next section, we'll see how
this is done.

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Input-Output Organization

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Input-Output Organization

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Hard Disk Interfaces

 ST-506/412
– is an old standard interface for
connecting hard disk drives to PCs.
– ST-506 is sometimes referred to as
MFM, which is the most prevalent
encoding scheme used on ST-506 disk
drives. ST-506 also supports the RLL
encoding format.

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Hard Disk Interfaces

 MFM (modified frequency


modulation),
– an encoding scheme used by PC floppy
disk drives and older hard drives.
– RLL (run length limited) produces
faster data access speeds and can
increase a disk's storage capacity by
up to 50 percent. RLL is used on most
newer hard drives.

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Hard Disk Interfaces
 ESDI (Enhanced Small Device
Interface)
– is an interface standard developed by a
consortium of the leading personal
computer manufacturers for
connecting disk drives to PCs. ESDI is
two to three times faster than the older
ST-506 standard. To use an ESDI drive,
your computer must have an ESDI
controller.
– Introduced in the early 80s, ESDI is
already obsolete.
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Hard Disk Interfaces
 IDE (Integrated Drive Electronics)
– is a standard electronic interface used between a
computer motherboard's data paths or bus and the
computer's disk storage devices.
– The IDE interface is based on the IBM PC ISA 16-bit bus
standard, but it is also used in computers that use
other bus standards.
– IDE gets its name because the disk drive controller is
built into the logic board in the disk drive.
– IDE was adopted as a standard by ANSI in November,
1990.
– The ANSI name for IDE is Advanced Technology
Attachment (ATA). The IDE (ATA) standard is one of
several related standards maintained by the T10
Committee.

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Hard Disk Interfaces
 SCSI (Small Computer System Interface)
– is a set of evolving ANSI standard electronic
interfaces that allow personal computers to
communicate with peripheral hardware such
as disk drives, tape drives, CD-ROM drives,
DVD-ROM drives, printers, and scanners
faster and more flexibly than previous
interfaces.
– Developed at Apple Computer and still used in
the Macintosh, the present set of SCSIs are
parallel interfaces.

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Hard Disk Interfaces

– SCSI allows up to 7 or 15 devices


(depending on the bus width) to be
connected to a single SCSI port in
daisy-chain fashion.
– This allows one circuit board or card to
accommodate all the peripherals, rather
than having a separate card for each
device, making it an ideal interface for
use with portable and notebook
computers.

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Hard Disk Interfaces
– The original SCSI, now known as SCSI-1,
evolved into SCSI-2, known as "plain SCSI."
as it became widely supported.
– SCSI-3 consists of a set of primary commands
and additional specialized command sets to
meet the needs of specific device types.
– The collection of SCSI-3 command sets is
used not only for the SCSI-3 parallel interface
but for additional parallel and serial protocols,
including Fiber Channel, Serial Bus Protocol
(used with the IEEE 1394 Firewire physical
protocol), and the Serial Storage Protocol
(SSP).

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Hard Disk Interfaces

– The latest SCSI standard is Ultra-3


(sometimes spelled "Ultra3")which
increases the maximum burst rate from
80 Mbps to 160 Mbps by being able to
operate at the full clock rate rather than
the half-clock rate of Ultra-2.
– The standard is also sometimes
referred to as Ultra160/m. New disk
drives supporting Ultra160/m will offer
much faster data transfer rates.

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Hard Disk Interfaces
Maximum Maximum
Technology Maximum Cable
Speed Number of
Name Length (meters)
(MBps) Devices

SCSI-1 6 5 8

SCSI-2 6 5-10 8 or 16

Fast SCSI-2 3 10-20 8

Wide SCSI-2 3 20 16

Fast Wide SCSI-2 3 20 16

Ultra SCSI-3, 8-bit 1.5 20 8

Ultra SCSI-3, 16-bit 1.5 40 16

Ultra-2 SCSI 12 40 8

Wide Ultra-2 SCSI 12 80 16


Ultra-3 (Ultra160/m)
12 160 16
SCSI

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Ports
 Serial - Parallel
– Serial means one event at a time. It is
usually contrasted with parallel,
meaning more than one event
happening at a time.
– In data transmission, the techniques of
time division and space division are
used, where time separates the
transmission of individual bits of
information sent serially and space (on
multiple lines or paths) can be used to
have multiple bits sent in parallel
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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Ports

 RS-232C
– RS-232C is a long-established standard
that describes the physical interface
and protocol for relatively low-speed
serial data communication between
computers and related devices.
– It was defined by an industry trade
group, the Electronic Industries
Association (EIA), originally for
teletypewriter devices.

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Ports
 USB
– USB (Universal Serial Bus) is a plug-and-play interface
between a computer and add-on devices (such as
audio players, joysticks, keyboards, telephones,
scanners, and printers).
– With USB, a new device can be added to your computer
without having to add an adapter card or even having
to turn the computer off.
– The USB peripheral bus standard was developed by
Compaq, IBM, DEC, Intel, Microsoft, NEC, and Northern
Telecom and the technology is available without charge
for all computer and device vendors.
– USB1 supports a data speed of 12 megabits per
second.
– This speed will accommodate a wide range of devices,
including MPEG video devices, data gloves, and
digitizers. It is anticipated that USB will easily
accommodate plug-in telephones that use ISDN and
digital PBX.
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Ports

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Ports
 USB Features
The Universal Serial Bus has the following features:
– The computer acts as the host.
– Up to 127 devices can connect to the host, either directly or by way of
USB hubs.
– Individual USB cables can run as long as 5 meters; with hubs,
devices can be up to 30 meters (six cables' worth) away from the
host.
– With USB 2.,the bus has a maximum data rate of 480 megabits per
second.
– A USB cable has two wires for power (+5 volts and ground) and a
twisted pair of wires to carry the data.
– On the power wires, the computer can supply up to 500 milliamps of
power at 5 volts.
– Low-power devices (such as mice) can draw their power directly from
the bus. High-power devices (such as printers) have their own power
supplies and draw minimal power from the bus. Hubs can have their
own power supplies to provide power to devices connected to the
hub.
– USB devices are hot-swappable, meaning you can plug them into the
bus and unplug them any time.
– Many USB devices can be put to sleep by the host computer when the
computer enters a power-saving mode.

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Ports
 USB 2.0
– The standard for USB version 2.0 was
released in April 2000 and serves as an
upgrade for USB 1.1.
– USB 2.0 (High-speed USB) provides additional
bandwidth for multimedia and storage
applications and has a data transmission
speed 40 times faster than USB 1.1.
– To allow a smooth transition for both
consumers and manufacturers, USB 2.0 has
full forward and backward compatibility with
original USB devices and works with cables
and connectors made for original USB, too.

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Ports
 The designers of the Universal Serial Bus
(USB) had several particular goals in mind
when they created the USB standard:
• Low implementation cost, so that USB could be
used in cheap peripherals like mice and game
controllers
• Low cabling cost
• Lots of devices on the bus
• Good speed characteristics for things like printers
– The idea was to create a system that would
replace all of the different ports on computers
(parallel ports, serial ports, special mouse and
keyboard ports, etc.) with a single standard.

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Ports

 IEEE1394 Firewire
– FireWire, originally created by Apple
and later standardized as IEEE-1394,
actually preceded USB and had similar
goals.
– The difference is that IEEE-1394 was
originally intended for devices working
with lots more data -- things like
camcorders, DVD players and digital
audio equipment.

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Ports
 IEEE-1394 and USB share a number of
characteristics and differ in some important
ways. Here's a summary:
– Like USB, IEEE-1394 is a serial bus that uses twisted-
pair wiring to move data around.
– However, while USB is limited to 12 megabits per
second, IEEE-1394 currently handles up to 400
megabits per second.
– USB can handle 127 devices per bus, while IEEE-1394
handles 63.
– Both USB and IEEE-1394 support the concept of a
isochronous device -- a device that needs a certain
amount of bandwidth for streaming data. This mode is
perfect for streaming audio and video data.
– Both USB and IEEE-1394 allow you to plug and unplug
devices at any time.

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Itanium IA64
 It is the first generation of the latest
processor architecture co-developed
by Hewlett-Packard and Intel.
– It is as significant as the first RISC or
CISC processor, and will be as
important to the evolution of computing
as those first releases were.
– The new specification, formerly known
as IA-64, is now designated as the
Itanium processor family (IPF)
architecture.

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Itanium IA64

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Itanium IA64

– It was developed as a high-


performance architecture that is
extremely parallel, carrying out more
instructions in one clock cycle than its
architectural predecessors.
– It does this by passing the burden of
instruction scheduling to the compiler
software that reorders the code for
maximum parallelism, while the
hardware focuses on executing the
instructions issued to it.

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
HP Workstation zx6000
 It is the first dual processor workstation
based on the Intel® Itanium® 2 processor,
Intel's latest 64-bit processor.
 It was designed with a chipset unique to
HP's Intel® Itanium® 2-based systems, the
HP Chipset zx1, which is built for high-
bandwidth and low-latency data transport
to keep this highly parallel processor fed
with data.
 It supports AGP graphics, and up to 24GB
of DDR SDRAM. It has a very slim form
factor and is available in a rackmount kit.
It supports three Ultra320 SCSI disk
drives.

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Intel® 82801BA (ICH20)

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
Intel® E8870 Chipset

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
4-way HP zx1 chipset

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
2-way HP zx1 chipset

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© 2002 Baker Hughes Incorporated All rights reserved. Rolando Del Cairo L. 012005
© 2003 Baker Hughes Incorporated All rights reserved.

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