Memory Interface

Memory Devices Memory unit:
a collection of cells capable of storing a large quantity of binary information and • to which binary information is transferred for storage • from which information is available when needed for processing together with associated circuits needed to transfer information in and out of the device • write operation: storing new information into memory • read operation: transferring the stored information out of the memory Two major types RAM (Random-access memory): Read + Write • accept new information for storage to be available later for use ROM (Read-only memory): perform only read operation

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Memory Interface
Types of Memories  Random vs. sequential – Random-Access Memory: each word is accessible separately • equal access time – Sequential-Access Memory: information stored is not immediately accessible but only at certain intervals of time • magnetic disk or tape • access time is variable Static vs. dynamic – SRAM: consists essentially of internal latches and remains valid as long as power is applied to the unit – DRAM: in the form of electric charges on capacitors which are provided inside the chip by MOS transistors

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Memory Interface
Volatile vs. non-volatile – volatile: stored information is lost when power is turned off – Non-volatile: remains even after power is turned off • magnetic disk, flash memory

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Memory Interface
Address Decoding •Decoding: addressing the right memory – access/select the right memory location
3-to-8 Line Decoder (74LS138)

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Memory Interface

64K X 8
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Memory Interface

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Memory Interface

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Memory Interface

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Memory Interface

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Memory Interface
Separate Bank Decoders: - Use of separate

bank decoders is often the least

effective way to decode memory address.

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Memory Interface
Separate Bank Write Strobes:

• for selection separate write strobe for each bank
• only one decoder is used to select 16 bit word memory

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Memory Interface
80386DX & 80486 ( 32 Bit)
• contain four 8-bit banks, each bank has 1GB of memory • Bank selection accomplished by the bank selection signals

• for 16 bit 2 banks will be considered & for 32 bit all banks are
considered. • requires PLD decoders instead of Integrated decoders Bank write signals:

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Memory Interface
FFFFFFFF FFFFFFFE

00000007 00000003
D31 D24

00000006 00000002
D23 D16

FFFFFFFD

FFFFFFFC

00000005 00000001
D15 D8

00000004 00000000
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Memory Interface
Pentium thru Pentium 4 ( 64 Bit)
• requires either 8 separate decoders or 8 separate write signals Bank write signal:

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Memory Interface
FFFFFFFF FFFFFFFE

0000000F 00000007
D63 D56

0000000E 00000006
D55 D48

FFFFFFFD

FFFFFFFC

0000000D 00000005
D47 D40

0000000C 00000004
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Memory Interface
FFFFFFFB FFFFFFFA

0000000B 00000003
D31 D24

0000000A 00000002
D23 D16

FFFFFFF9

FFFFFFF8

00000009 00000001

D15

D8

00000008 00000000
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Memory Interface
512kb EPROM memory to Pentium – Pentium 4

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