INPUT/OUTPUT ORGANIZATION

Accessing I/O devices Memory Mapped I/O Isolated I/O Program Controlled I/O Interrupts


One of the basic features of computer is its ability to exchange data with other devices. In some applications, computers are less visible but equally important. So, a general purpose computer should have the ability to exchange data with a wide range of devices in varing environments. In this chapter, we will see in detail various ways in which I/O operations are performed.

ACCESSING I/O DEVICES

Single bus structure.

- Each I/O device is assigned a unique set of address - When processor places the particular address on the address lines, the device that recognizes this address responds to the commands issued on the control lines.
-If

I/O devices and the memory share the same address space the arrangement is called memorymapped I/O -The special signal on the bus indicates that the requested read or write transfer is a I/O operation.
-Memory

unit ignores the requested transfer, I/O devices examine the low-order bits of the address bus to determine whether they should respond

To communicate with an I/O device, we need - Access to various registers (data, status, - This access depends on I/O mapping - Two basic ways Memory-mapped I/O Isolated I/O

A protocol to communicate (to send data, ) Three types Programmed I/O Direct memory access (DMA) Interrupt-driven I/O

Memory-mapped I/O Reading and writing are similar to memory read/write Uses same memory read and write signals Most processors use this I/O mapping Isolated I/O Separate I/O address space Separate I/O read and write signals are needed Pentium supports isolated I/O

Address lines Data lines

Bus

Control lines

I/O I

Address Control Decoder circuit NTERFACE

Data & Status Register

Input device

I/O INTERFACE

Address decoder enables the device to recognize its address when it appears on the address lines Data register holds the data being transferred Status register contains information relevant to the operation of the I/O device The Address decoder, the data & status register and the control circuitry required to coordinate I/O transfer constitute the Devices interface circuit.

I/O devices operate at very low speeds that of processors The basic idea used for performing input & output operations is a status flag i,e SIN and SOUT is included in the interface circuit as part of the status register To review the concept, let us consider a example of I/O operations involving a keyboard and a display device.

WAITK

WAITD

Move #line,R0 Testbit #0,status Branch=0 WAITK Move DATAIN,R1 Testbit #1,status Branch=0 WAITD Move R1, DATAOUT Move R1,(R0)+ Compare #$0D, R1 Branch!= 0 WAITK Move #$0A,DATAOUT CALL PROCESS

INTERRUPTS

One of the commonly used mechanism for implementing I/O operations Synchronization is achieved by having the I/O device send a special signal over the bus whenever it is ready for a data transfer operation. One of the bus control lines called as interruptrequest line is used for this purpose

By using interrupts the waiting periods of processor can be eliminated.

TRANSFER OF CONTROL VIA INTERRUPTS

The routine executed in response to an interrupt request is called as interrupt- service routine (ISR) Interrupt acknowledge signal is used to inform the device that the processor has served its request

SUMMARY
In this chapter we have discussed Different I/O transfers Interrupts

EXPECTED QUESTIONS
Why I/O Devices can not be connected directly to the system bus? Give comparison between memory mapped I/O and I/O mapped I/O. What is an interrupt ?