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more accurately controlled than a normal motor allowing fractional turns or n revolutions to be easily done low speed, and lower torque than a comparable D.C. motor useful for precise positioning for robotics Servomotors require a position feedback signal for control
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Terminology
Steps per second, RPM
SPS = (RPM * SPR) /60
Number of teeth 4-step, wave drive 4-step, 8-step Motor speed (SPS) Holding torque
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Unipolar Motors
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Unipolar Motors
To rotate we excite the 2 windings in sequence
W1a - 1000100010001000100010001 W1b - 0010001000100010001000100 W2a - 0100010001000100010001000 W2b - 0001000100010001000100010
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Unipolar Motors
To rotate we excite the 2 windings in sequence
W1a - 1100110011001100110011001 W1b - 0011001100110011001100110 W2a - 0110011001100110011001100 W2b - 1001100110011001100110011
This gives two full revolutions at 1.4 times greater torque but twice the power
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Enhanced Waveforms
Unipolar Motors
The two sequences are not the same, so by combining the two you can produce half stepping
W1a - 11000001110000011100000111 W1b - 00011100000111000001110000 W2a - 01110000011100000111000001 W2b - 00000111000001110000011100
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Example
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Analog to Digital
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Vin Range
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Timing
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Interfacing ADC
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Example
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Temperature Sensor
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Printer Connection
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Printers Ports
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8255
8051 has limited number of I/O ports one solution is to add parallel interface chip(s) 8255 is a Programmable Peripheral Interface PPI Add it to 8051 to expand number of parallel ports 8051 I/O port does not have handshaking capability 8255 can add handshaking capability to 8051
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8255
Programmable Peripheral Interface (PPI)
Has 3 8_bit ports A, B and C Port C can be used as two 4 bit ports CL and Ch Two address lines A0, A1 and a Chip select CS 8255 can be configured by writing a control-word in CR register
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Mode 0
Provides simple input and output operations for each of the three ports.
No handshaking is required, data is simply written to or read from a specified port. Two 8-bit ports and two 4-bit ports. Any port can be input or output. Outputs are latched. Inputs are not latched
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Mode 1
Mode 1 Basic functional Definitions:
Two Groups (Group A and Group B). Each group has one 8-bit data port and one 4-bit control/data port. The 8-bit data port can be either input or output. Both inputs and outputs are latched. The 4-bit port is used for control and status of the 8-bit data port.
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A response from the peripheral device indicating that it has read the data.
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Output Operations
Mode 2
Pin PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 Function /OBF /ACK IBF /STB INTR I/O I/O I/O
OBF (Output Buffer Full). The OBF output will go low to indicate that the CPU has written data out to port A. ACK (Acknowledge). A low on this input enables the tri-state output buffer of Port A to send out the data. Otherwise, the output buffer will be in the high impedance state.
Input Operations
STB (Strobe Input). A low on this input loads data into the input latch. IBF (Input Buffer Full F/F). A high on this output indicates that data has been loaded into the input latch.
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BSR Mode
If used in BSR mode, then the bits of port C can be set or reset individually
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74138
8051
ALE
P0.7-P0.0
(AD7-AD0)
38 decoder
/CS
8255
O0 74373 O1
D7-D0
A0 A1
O7 D7-D0
/RD /WR
/RD /WR
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8255 memory mapped to 8051 at address C000H base Control word for all ports as outputs in mode0
CR : 1000 0000b = 80H
A = C000H, B = C001H, C = C002H, CR = C003H
test:
repeat:mov DPTR,#C000H movx @DPTR, A inc DPTR movx @DPTR, A inc DPTR movx @DPTR, A cpl A acall MY_DELAY sjmp repeat
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control word address of CR write control word will try to write 55 and AA alternatively address of PA write 55H to PA now DPTR points to PB write 55H to PB now DPTR points to PC write 55H to PC toggle A (55AA, AA55) small delay subroutine for (1)
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