ELEC2630 EMBEDDED

SYSTEMS THEORY
Lecture 5: Microcomputer
Fundamentals
CISC and RISC
 CISC
• The original mainframe computers, and the
minicomputers derived from them,
developed along the CISC route
• Each task had an instruction to achieve the
result required with how ever many steps
that were needed
• When microcontrollers were developed
commercially in 1971 they natually followed
the same route
 CISC HARDWARE
• The hardware was developed by many
different manufacturers but one common
feature was a large number of named
registers each with a different instruction to
use them
• When a subroutine was called, any register
that could be overwritten in that routine had
to be saved at the beginning and restored
at the end, causing a large time overhead
• The answer many used was context
switching
 CONTEXT SWITCHING
• A section of memory would be used as a
collection of named registers
• A register would hold the start address in
memory for this block
• When a subroutine was called, the value in
that register was changed to point to
another block and the registers used as
normal
• At the end of the routine, the address was
changed back to the original registers
 MICROPROCESSOR
DEVELOPMENT
• The microprocessor designs were much
more varied initially than earlier computer
designs had been but many followed the
large number of named registers route
• Some also developed a method of context
switching to help improve performance
when calling subroutines
• The Z80 microprocessor from 1976 in an
example of just such a design
Z80 EXAMPLE
 Z80 FEATURES

• Note the collection of named registers, the

pairs shown next to each other such as DE
had additional intructions to use them as a
16 bit pair
• The two sets of registers, e.g. D and D’, are
a dupplicate set and can be changed with
on instruction, forming a context switch for
subroutine calls
• The Z80 was one of the most popular 8 bit
microprocessors until the mid 1980’s
 RISC DESIGN
• Research by IBM in the early 1970’s began
to develop an alternative to the CISC chip
• Statistical measures on professionally
written code showed that 80% of the code
used only 20% of the CISC instruction set
• These 20% also tended to be the simpler
instructions
• Improving the efficiency of these simple
instructions would improve overall
performance dramatically
 RISC – the next step
• Make all instructions simple
• Optimise the hardware to run the small
instructions
• Carry out complex tasks with a series of
simpler instructions
• If the gains in performance are high
enough even a series of simpler
instructions are quicker than a single CISC
instruction to do the same task
 RISC HARDWARE
• There were a number of RISC machines
developed in the 1970’s including the
SPARC by Sun Microsystems and many
adopted the Harvard model of separate
buses for instructions and data
• The development of the microcontroller
with it’s integration the separate elements
of CPU, memory and I/O proved to be an
ideal partner for RISC technology
 ARM – An early RISC
Microcontroller
• The ARM device used all the RISC
techniques such as simple addressing
modes and fixed length instructions
• The register file, i.e. a collection of memory
locations used as registers is arranged in
banks to allow a form of context switching
to be used by changing banks
 EMBEDDED RISC
DEVELOPMENTS
• Later microcontrollers used the flexibility
provided by the harvard dual bus approach
to use a larger lengh program word and
incorporate opcode and any required extra
information together thus reducing the
number of memory operation per task
• A second feature, brought from the earlier
CISC designs such as the 8086, is
pipelining which dramatically improved
speed of operation by fetching the next
instrution whilst processing the current one
 NEXT LECTURE
• How pipelining works
• What are it’s advantages
• What are it’s disadvantages and how are
they overcome.