Data Communications & Networks

Chapter 4

Line coding and decoding

Line Coding : process of converting digital data to digital signals. i.e. Converting a string of 1s and 0s (digital data) into a sequence of signals that denote the 1s and 0s. For example a high voltage level (+V) could represent a 1 and a low voltage level (0 or V) could represent a 0. Data, in the form of text, numbers, graphical images, audio or video are stored in computer as sequence of bits.

Line coding and decoding

At the sender, digital data are encoded in digital signal; at the Rr, the digital data are recreated by decoding the digital signal.

Mapping Data symbols onto Signal levels

A data symbol (or element) can consist of a number of data bits:
1 , 0 or 11, 10, 01,

A data symbol can be coded into a single signal element or multiple signal elements
1 -> +V, 0 -> -V 1 -> +V and -V, 0 -> -V and +V

The ratio r is the number of data elements carried by a signal element.

Relationship between data rate and signal rate

The data rate defines the number of bits sent per sec - bps. It is often referred to the bit rate. The signal rate is the number of signal elements sent in a second and is measured in bauds. It is also referred to as the modulation rate. Goal is to increase the data rate whilst reducing the baud rate.

Signal element vs. data element

Data element : smallest entity that represent a piece of information: i.e. the Bit. In digital data communication, a signal element carries data elements, i.e. signal element is the shortest unit (time-wise) of digital signal. Data element and signal element are not the same because one pulse may represent several bits.

r = number of data elements / number of signal elements

Data Rate vs. Signal Rate

Data rate: the number of data elements (bits) sent in 1s (bps). Its also called the bit rate. Signal rate: the number of signal elements sent in 1s (baud). Its also called the pulse rate, the modulation rate, or the baud rate.
We wish to: 1) increase the data rate (i.e. increase the speed of transmission) 2) decrease the signal rate (i.e. decrease the bandwidth requirement) 3) Worst case (i.e. max signal rate), best case (i.e. min. signal rate), and average case of r 4) In data communication we usually interested in average case. 5) The baud or signal rate can be expressed as: S = c x N x 1/r bauds. (S signal rate; N Data rate; c is the case factor, which varies for each case; ratio r depends on data pattern))

Example
A signal is carrying data in which one data element is encoded as one signal element (r = 1). If the bit rate is 100 kbps, what is the average value of the baud rate is 0<c<1. Solution: average value of c = , The baud rate then S = c x N x (1/r) = x 100, 000 x (1/1) = 50, 000 = 50 kbaud

Signal level versus data level

Baseline Wandering
Baseline: running average of the received signal power Baseline wandering: long string of 0s or 1s cause a drift in baseline, difficult for Rr to decode correctly. A good line coding scheme needs to prevent baseline wandering.

Loss of amplitude references for long strings 1s and 0s

- Strings of 1s: increase probability for 1 to 0 errors - Strings of 0s: increase probability for 0 to 1 errors

DC component
DC Components : Constant digital signal creates low frequencies, these frequencies around zero, called DC (directcurrent) components.

Self-synchronization
Self-synchronization : Receiver Setting the clock matching the senders, i.e. Rr bit intervals must corresponds exactly to the senders bit intervals.

Bandwidth
NOTE: Although the actual bandwidth of a digital signal is infinite, the effective bandwidth is finite. Bandwidth (Range of frequencies) is proportional to the signal rate (baud rate). The minimum bandwidth can be Bmin = c x N x 1/r bauds. Maximum data rate if the bandwidth of the channel is given. Nmax = (1/c) x Bx (r) A signal with L levels actually carry log2L bits per level. If each level corresponds to one signal element and we assume the average case(c=1/2),then

Example
In a digital transmission, the receiver clock is 0.1 percent faster than the sender clock. How many extra bits per second does the receiver receive if the data rate is 1 Kbps? How many if the data rate is 1 Mbps?
At 1 Kbps: 1000 bits sent 1001 bits received1 extra bps At 1 Mbps: 1,000,000 bits sent 1,001,000 bits received1000 extra bps

Example 1
A signal has two data levels with a pulse duration of 1 ms. We calculate the pulse rate and bit rate as follows:
Pulse Rate = 1/ 10-3= 1000 pulses/s Bit Rate = Pulse Rate x log2 L = 1000 x log2 2 = 1000 bps

Example 2
A signal has four data levels with a pulse duration of 1 ms. We calculate the pulse rate and bit rate as follows:
Pulse Rate = = 1000 pulses/s

Bit Rate = PulseRate x log2 L = 1000 x log2 4 = 2000 bps

Line coding schemes

Unipolar NRZ encoding

Unipolar encoding uses only one voltage level.

Normalized power (power required to send 1bit per Unit line resistance)

Polar NRZ-L and NRZ-I schemes

Polar encoding uses two voltage levels (positive and negative). Typically, negative = 1, and positive = 0 NRZ-L (NRZ Level): the level of the signal is dependent upon the state of the bit. The signal never returns to zero, and the voltage during a bit transmission is level. NRZ-I (NRZ Invert): the signal is inverted if a 1 is encountered. Differential version is NRZ. Change=1, no change=0

N = Bit rate Save = Average signal rate

Polar NRZ-L and NRZ-I schemes

Advantage of differential encoding is that it is more reliable to detect a change in polarity than it is to accurately detect a specific level

Problems With NRZ

Difficult to determine where one bit ends and the next begins In NRZ-L, long strings of ones and zeroes would appear as constant voltage pulses Timing is critical, because any drift results in lack of synchronization and incorrect bit values being transmitted

Note
In NRZ-L the level of the voltage determines the value of the bit. In NRZ-I the inversion or the lack of inversion determines the value of the bit. NRZ-L and NRZ-I both have an average signal rate of N/2 Bd.

NRZ-L and NRZ-I both have a DC component problem and baseline wandering, it is worse for NRZ-L. Both have no self synchronization &no error detection. Both are relatively simple to implement.

Polar - RZ
The Return to Zero (RZ) scheme uses three voltage values. +, 0, -. Each symbol has a transition in the middle. Either from high to zero or from low to zero. This scheme has more signal transitions (two per symbol) and therefore requires a wider bandwidth. No DC components or baseline wandering. Self synchronization - transition indicates symbol value. More complex as it uses three voltage level. It has no error detection capability.

Polar RZ scheme

Manchester Code/ Digital Bi-phase

Idea of RZ and the Idea of NRZ-L are combined into the Manchester scheme. Transition in the middle of each bit period Transition provides clocking and data i.e Self-clocking codes and no dc component Low-to-high=1 , high-to-low=0 This type of signaling is also called splitphase encoding.

Differential Manchester
Differential Manchester scheme combines the Idea of RZ and the Idea of NRZ-I. Mid-bit transition is only for clocking Transition at beginning of bit period = 0 Transition absent at beginning = 1 Transition means binary 0; no transition means 1

Polar biphase: Manchester and differential Manchester schemes

Polar bi-phase: Manchester and differential Manchester schemes

Note

In Manchester and differential Manchester encoding, the transition at the middle of the bit is used for synchronization. The minimum bandwidth of Manchester and differential Manchester is 2 times that of NRZ. The is no DC component and no baseline wandering. None of these codes has error detection.

Bipolar - AMI and Pseudoternary

Code uses 3 voltage levels: +, 0, -, to represent the symbols (note not transitions to zero as in RZ). Voltage level for one symbol is at 0 and the other alternates between + & -. Bipolar Alternate Mark Inversion (AMI): 0 symbol is represented by zero voltage and the 1 symbol alternates between +V and -V. Pseudoternary is the reverse of AMI.

AMI (Alternate Mark Inversion) and pseudoternary

Bipolar C/Cs
It is a better alternative to NRZ. Has no DC component or baseline wandering. Has no self synchronization because long runs of 0s results in no signal transitions. No error detection.

Multilevel Schemes
In these schemes, we increase the number of data bits per symbol thereby increasing the bit rate. Since we are dealing with binary data we only have 2 types of data element ----- a 1 or a 0. We can combine the 2 data elements into a pattern of m elements to create 2m symbols. If we have L signal levels, we can use n signal elements to create Ln signal elements.

Code C/Cs
Now we have 2m symbols and Ln signals. If 2m > Ln then we cannot represent the data elements, we dont have enough signals. If 2m = Ln then we have an exact mapping of one symbol on one signal. If 2m < Ln then we have more signals than symbols and we can choose the signals that are more distinct to represent the symbols and therefore have better noise immunity and error detection as some signals are not valid.

Multilevel Schemes
In mBnL schemes, a pattern of m data elements is encoded as a pattern of n signal elements in which 2m Ln m: length of the binary pattern B: binary data n: length of the signal pattern L: number of levels in the signaling A letter is often used in place of L L = B for 3 binary L = T for 3 ternary L = Q for 4 quaternary.

Multilevel: 2B1Q scheme

2BIQ----two binary, one quaternary, uses data patterns of size 2 and encodes the 2-bit patterns as one signal element belonging to a four-level signal. In this type of encoding m=2, n=1, and L=4 (quaternary).

Multi-transition Coding
Because of synchronization requirements we force transitions. This can result in very high bandwidth requirements -> more transitions than are bits (e.g. mid bit transition with inversion). Codes can be created that are differential at the bit level forcing transitions at bit boundaries. This results in a bandwidth requirement that is equivalent to the bit rate. In some instances, the bandwidth requirement may even be lower, due to repetitive patterns resulting in a periodic signal.

Multitransition: MLT-3 scheme

The multiline transmission, three level (MLT-3) scheme uses three levels (+v, 0, and -V) and three transition rules to move between the levels. 1. If the next bit is 0,there is no transition. 2. If the next bit is 1and the current level is not 0,the next level is 0. 3. If the next bit is 1 and the current level is 0, the next level is the opposite of the last non zero level.

Multitransition: MLT-3 scheme

MLT-3
Signal rate is same as NRZ-I But because of the resulting bit pattern, we have a periodic signal for worst case bit pattern: 1111 This can be approximated as an analog signal a frequency 1/4 the bit rate!

Summary of line coding schemes

Block Coding
For a code to be capable of error detection, we need to add redundancy, i.e., extra bits to the data bits. Redundancy is needed to ensure synchronization and to provide error detecting. Block coding is referred to as an mB/nB encoding technique. It changes a block of m-bit into an block of n-bit, where n is larger than m. The slash in block coding (e.g. 4B/5B) distinguishes block encoding from multi-level encoding, e.g .(8B6T)). In the mB/nB encoding schemes, m data bits is represented by a sequence of n pulses, the eciency increases from 50 % in Manchester to m/n %.

Block Coding Concept

Block coding is done in three steps: division, substitution and combination. In the division step, a sequence of bits is divided into group of m bits. e.g. in 4B/5B encoding, the original bit sequence is divided into 4-bit groups. Substitution step is the heart of block coding. In this step, we substitute an m-bit group with an n-bit group. e.g. in 4B/5B encoding we substitute a 4-bit group with a 5-bit group. Finally, n-bit groups are combined to form a stream and new stream has more bits than original bits.

Block coding concept

4B/5B encoding/mapping codes

In 4B/5B, the 5 bit output that replaces the 4 bit input has no more than one leading zero (left bit) and no more than two trailing zeros (right bits). Thus, when different groups are combined to make a new sequence, there are never more than 3 consecutive zeros.

Data

Code

Data

Code

Data

Code

0000 0001 0010 0011

11110 01001 10100 10101

1000 1001 1010 1011

10010 10011 10110 10111

Q (Quiet) I (Idle) H (Halt) J (start delimiter) K (start delimiter) T (end delimiter) S (Set) R (Reset)

00000 11111 00100 11000 10001 01101 11001 00111

0100
0101 0110 0111

01010
01011 01110 01111

1100
1101 1110 1111

11010
11011 11100 11101

Substitution in 4B/5B block coding

Redundancy
A 4 bit data word can have 16 combinations. A 5 bit word can have 32 combinations. We therefore have 32 - 26 = 16 extra words. Some of the extra words are used for control/signalling purposes.

Using block coding 4B/5B with NRZI line coding scheme

NRZ-I has a good signal rate, one-half that of the biphase, but it has a synchronization problem. A long sequence of 0s can make the receiver clock lose synchronization. One solution is to change the bit stream, prior to encoding with NRZ-I, so that it does not have a long stream of 0s.

Example
How many invalid (unused) code sequences can we have in 5B/6B encoding? How many in 3B/4B encoding? Solution:
In 5B/6B, we have 25 = 32 data sequences and 26 = 64 code sequences. The number of unused code sequences is 64 32 = 32. In 3B/4B, we have 23 = 8 data sequences and 24 = 16 code sequences. The number of unused code sequences is 16 8 = 8.

Scrambling
We are looking for a technique that does not increase the number of bits and does provide synchronization. We are looking for a solution that substitutes long zero-level pulses with a combination of other levels to provide synchronization. One solution is called scrambling. Note that scrambling, as opposed to block coding, is done at the same time as encoding. The system needs to insert the required pulses based on the defined scrambling rules. Two common scrambling techniques are B8ZS and HDB3.

AMI used with scrambling

B8ZS Encoding

1 Amplitude

Time

Violation

Violation

B8ZS substitutes eight consecutive zeros with 000VB0VB. The V stands for violation, it violates the line encoding rule B stands for bipolar, it implements the bipolar line encoding rule

Two cases of B8ZS scrambling technique

HDB3 (High Density Bipolar of order 3 code)

HDB3 (High Density Bipolar of order 3 code)

Replacing series of four bits that are to equal to "0" with a code word "000V" or "B00V", where "V" is a pulse that violates the AMI law of alternate polarity and is rectangular or some other shape. The rules for using "000V" or "B00V" are as follows:
"B00V" is used when up to the previous pulse, the coded signal presents a DC component that is not null (the number of positive pulses is not compensated for by the number of negative pulses). "000V" is used under the same conditions as above when up to the previous pulse the DC component is null. The pulse "B" ("B" for balancing), which respects the AMI alternancy rule, has positive or negative polarity, ensuring that two successive V pulses will have different polarity.

HDB3 substitutes four consecutive zeros with 000V or B00V depending on the number of nonzero pulses after the last substitution. If # of non zero pulses is even the substitution is B00V to make total # of non zero pulse even. If # of non zero pulses is odd the substitution is 000V to make total # of non zero pulses even.

Different situations in HDB3 scrambling technique

1 A 0 -A