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Digital Stopwatch
Introduction :
A Digital Stop Watch built around timer IC NE555 and 4-
digitcounter IC MM74C926 with multiplexed 7segment
display. MM74C926 consists of a 4-digit counter, an internal
output latch, npn output sourcing drivers for common
cathode,7 segment display and internal multiplexing circuitry
with four multiplexing outputs.The counter advances on the
negative edge of the clock. The clock is generated by the
timer NE555. The circuit works of a 5 volt power supply. It
can be easily assembled on a general-purpose PCB. Enclose the
circuit in the wooden box with provisions for 7-segment
displays, time varying switch S1, start/stop switch S2, and
reset switch S3.
Components used:
IC MM74C926
IC NE555N
NE555 Timer
General Description:
The LM555 is a highly stable device for generating accurate
time delays or oscillation. Additional terminals are provided
for triggering or resetting if desired. In the time delay mode
of operation, the time is precisely controlled by one external
resistor and capacitor. For astable operation as an oscillator,
the free running frequency and duty cycle are accurately
controlled with two external resistors and one capacitor. The
circuit may be triggered and reset on falling waveforms, and
the output circuit can source or sink up to 200mA or drive
TTL circuits.
Features:
ASTABLE OPERATION
FEATURES
• Low current (max. 100 mA)
• Low voltage (max. 65 V).
APPLICATIONS
• General purpose switching and amplification.
DESCRIPTION
NPN transistor in a TO-92; SOT54 plastic package.
PNP complements: BC556 and BC557.
PIN DESCRIPTION
1 emitter
2 base
3 collector
BC557:
FEATURES
· Low current (max. 100 mA)
· Low voltage (max. 65 V).
APPLICATIONS
· General purpose switching and amplification.
DESCRIPTION
PNP transistor in a TO-92; SOT54 plastic package.
NPN complements: BC546 and BC547.
PIN DESCRIPTION
1 emitter
2 base
3 collector
WORKING:
Circuit Diagram:
DESCRIPTION:
IC NE555N
ZENER DIODE
TRANSISTOR BC548
CAPACITOR 0.01µF
Theory:
NE555 Timer :
General Description:
The LM555 is a highly stable device for generating accurate
time delays or oscillation. Additional terminals are provided
for triggering or resetting if desired. In the time delay mode
of operation, the time is precisely controlled by one external
resistor and capacitor. For astable operation as an oscillator,
the free running frequency and duty cycle are accurately
controlled with two external resistors and one capacitor. The
circuit may be triggered and reset on falling waveforms, and
the output circuit can source or sink up to 200mA or drive
TTL circuits.
Features:
MONOSTABLE OPERATION
In this mode of operation, the timer functions as a one-shot.
The external capacitor is initially held discharged by a
transistor inside the timer. Upon application of a negative
trigger pulse of less than 1/3 VCC to pin 2, the flip-flop is set
which both releases the short circuit across the capacitor and
drives the output high. The voltage across the capacitor then
increases exponentially for a period of t = 1.1 RA C, at the end
of which time the voltage equals 2/3 VCC. The comparator
then resets the flip-flop which in turn discharges the
capacitor and drives the output to its low state. Since the
charge and the threshold level of the comparator are both
directly proportional to supply voltage, the timing interval is
independent of supply.
Monostable Mode
Features:
62 Note ROM Memory
Voltage rating: 1.3V to 3.3 V
Power on reset
Pin Diagram:
PIN DESCRIPTION:
FEATURES
• Low current (max. 100 mA)
• Low voltage (max. 65 V).
APPLICATIONS
• General purpose switching and amplification.
DESCRIPTION
NPN transistor in a TO-92; SOT54 plastic package.
PNP complements: BC558.
PIN DESCRIPTION
1 emitter
2 base
3 collector
WORKING:
Circuit Diagram:
DESCRIPTION: