ELECTRONICS II

Engr. Ryann Alimuin

INSTRUCTOR
 BJT Modelings
• 2 models
1. RE Model
2. Hybrid Model

Model – is the combination of the circuit elements properly

chosen that best appropriate the actual behavior of the
semiconductor devices under specific operating
condition.
Steps in getting the AC Equivalent Circuit

• Set all the DC source to zero and replace them by a

short circuit equivalent.
• Replace all the capacitors by a circuit equivalent.
• Remove all the elements bypassed by the short circuit
equivalent introduced by steps 1 and 2.
• Redraw the networks In a more convenient and logical
form.
 1. Input Impedance, Zi

• for small signal analysis, once the input impedance has

been determined the same numerical value can be used
for changing levels of applied signals.
• The input impedance of a BJT amplifier is purely
resistive in nature and depending in the manner in which
the transistor is employed, can vary form a few ohms to
mse.

Note:
An ohmmeter can be used to measure the small
signal ac input impedance since the ohmmeter operates
in dc mode.
 2. Output impedance, Zo

• The output impedance is determined at the output

terminals looking back into the system with the applied
signal set to zero.
 3. Voltage Gain – Av

• One of the most important characteristics of an amplifier

is the signal AC voltage gain as determined by
• Condition is if Rl is approaching infinity.

• AVNL – No Load Voltage Gain

• The load has not been converted to the output terminals

•
• For Transistor amplifiers , The no load voltage gain is
greater than the loaded voltage gain
 Depending on the configuration, magnitude of the

voltage gain for a loaded single stage transitive amplifier

typically ranges from just less than 1 to a few hundred.

A multi-stage system, however can have a voltage gain in

thousands.
 4. Current Gain- Ai

• For BJT Amplifier, the current typically range from a level

, just less than 1 to a level that may exceed 100
• Voltage gain
 Example:
•Vi
•Zi
•Avnl
•Avs
(A.)Vi
Vs-IiRs-Vi=0
18mV-(10µA)(.65KΩ)-Vi
Vi= 11.5mV

(B.)Zi
Zi=Vi/Ii
=11mV/10mA
=1.15KΩ
 (C.) Avnl
Avnl=Vo/Vi
=3.6V/11.5mV
=313V

(D.) Avs
= Vo/Vs
=3.6/18mV
=200V
 Systems Approach
• Effects of Rs and Rl
• Using Voltage Divider
Example

In the figure , a load impedance has been applied to

the fixed bias transistor amplifier.Determine Av and Ai
using two port systems. Determine Av and Ai using the
RE Model and compare results.

• Rc= Ro
• Ro=10.71
• Avnl= -280.11
• Zi= 1.071KΩ
• Zo= 3KΩ
• Av using current divider theorem
2. For prefixed bias,
Determine:
A. Avnl,Zi and Zo
B. Sketch the two port model and
parameters
C. Calculate Av.
D. Determine Ai
E. Calculate Av and Ai using AC
analysis
• DC Analysis
• (B.)Sketch two port model and parameter
• (C.)Calculate Av

• (D.)Determine Ai
• (E.)Calculate Av and Ai using AC Analysis
 Effects of Source Impedance (Rs)
• - the effect of an internal resistance on the gain of the
amplifier
• - The parameter Zi and Avnl of a two port system are
unaffected by an internal resistance of the applied
source.
• In Fig. A source w/ an internal resistance has been
applied to the fixed bias transistor
• Determine the voltage gain Avs= Vo/Vs.What % of the
applied signal
• Determine the voltage gain Avs= Vo/Vs using the RE
model
DC Analysis
 Combined Effects Of Rs and Rl

• A source of Rs and a load Rl have been applied in a two

port systems for which the parameters Zi, Avnl, and Zo
have been specified.
• Assume Zi and Zo are unaffected by Rl and Rs
• Using Voltage Divider Bias
• Example.
For a single stage amplifier with Rl= 4.7KΩ and Rs=
0.3KΩ.
 BJT And JFET Frequency Response

• Logarithms

• Example.
B=10 , X= 2
 Decibels
• the relationship of logarithms to power and audio levels.

• the term (BEL) was derived from the surname of

Alexander Grahambell.
 Power = 10
• Voltage = 20
• Current = 20
Examples.
1.) Find the magnitude gain corresponding to a decibel gain
of 100.
2.) The input power to a device is 10000v at avoltage of
1000v. The output power is 500w, while the output
impedance is 20Ω.

• (a.)Find the power gain dB

• b.)Find the voltage gain in dB
CASCADED AMPLIFIER

AVT= (Av1)(Av2)
 R2 4.7KΩ
VTH  Vcc  20V  4.77V
R1  R2 4.7KΩ  15KΩ

V
RTH  4.7 K // 15KΩ  3.58KΩ

VTH  VBE 4.77V  0.7V

IB    19.89 A
RTH  (β  1)RE 3.58KΩ  (201)1KΩ

IE  (201)19.89 μA  3.94mA

26mV
re   6.50 Ω
3.94mA
 Zi  RTH // Bre  3.58 K // (200)(6.50 Ω)  953.69Ω
 Rc // Zi 2.2 K // 953.69Ω
Av 1    102.334
re 6.50Ω
Vo 1  Av 1Vi    102.334 25   2.56mV
 Rc 2.2K Ω
Av 2    338.46
re 6.50 Ω
ΑvΤ  (  102.334)(  338.46)  34,635

Vo 2  AVTVi  (34,635)(25 V)  865.9mV

If a 10KΩ resistor is connected across the output. What is Vi?

 RL   10KΩ 
Vi   Vo   856.9mV  709.75mV
 RL  RC   10KΩ  2.2KΩ 
 JFET(JUNCTION FIELD EFFECT
TRANSISTOR)
A type of FET that operates with a reversed-biased
junctio.n to control current in a channel.

GM= Forward transconductance change in drain current

 for
DI  a given change in rate to source voltage  VGS 
with the drain to source voltage constant.

ΔIB
GM   SIEMENS
ΔVGS
2
 1  VGS 
IB  IDSS 
 VGS(OFF) 
 gm or Forward Transfer Admittance

 VGS 
gm  gmo 1  
 VGS(off) 
2IDSS
gmo 
|VGS(off)|
DEPLETION MOSFET ( D-MOSFET)- The drain &
source are diffused into the substrate material & then
connected by a narrow channel adjacent to the insulated
gate.
n-channel-operates in the
depletion mode when a negative
gate-to-source voltage is applied
& in enhancement mode when a
positive gate to source voltage is
applied
FET AMPLIFIERS
AC Equivalent

 gmRd
Av 
1 gmRs 
I D  I DS S  1 

I D Rs 

V GS(Off) 
2

V GS   IDRs
FET EQUIVALENT CIRCUIT

If no RL:
Vi Vout IdRd gmIdRd
Av    
Vo VGs Id Id
Av  gmRD
gm
Av  gmRd
Internal Drain Resistance

Av   gm(rds//Rd)
Av  gm(rds//(RD//RC)

Effects of the source resistance on gain

By KVL:

Vi  Vgs  IdRs  0
Vi  Vgs  IdRs
Vo  IdRd
 Vo IdRd IdRd
Av   
Vi Vgs IdRs Id  IdRs
gm

gmRd
Av 
1  gmRs

gmRd
Av 
1  gmRs ( If there is Rs )
Example: Bypassed source Resistance

Zi  R G
Zo  Rd
Av   gm(R O //R L )
Av   gmR D

 gmRd
Av 
1  gmRs
Example: The JFET has a gm=4mS w/ external ac drain
resistance of 1.5K Ω , is the ideal voltage gain?

Av   gmRD
Av   4mS(1.5K )
Av  -6
Example: An FET equivalent circuit is shown. Determine
the volatage gain when the output is taken across Rd.

gmRD 4mS(1.5KΩm
Av  
1  gmRs 1  4mS(560Ωm
Av  1.852
JFET SELF-BIAS CONFIGURATION
AC Analysis

1
rd 
yos

1
rd 
yos
Example: The fixed bias configuration has an operating
point defined by VGSQ=-2V and
IDQ=5.625mA with IDSS=10mA & Vp=-8V, The network
should be redrawn w/ an applied signal Vi. The Value of
yos is provided as 40µS.

Calculate:
a. gm e. Av
b. rd f. Av if rd is IGNORED
c. Zi
d. Zo
 Circuit Diagram
2IDSS 0.02
a.)gmo    2.5mS
/Vp/ 8
 2
gm  2.5m 1    1.875mS
 8
1 1
b.)rd    25KΩ
yos 40μ0
c.)1MΩ
d.)2KΩ

e.) Av   gm ( RD // Rd )  (  1 . 875 mS )( 2 K  // 25 K  )
  3 . 475
f .) Av  (  18 . 875 mS )( 2 K  )   3 . 75
 CASCODE CONNECTION (BJT)
- Cascode Connection has a transistor on top or in
series with another.
-A Common Emitter ( CE ) stage feeding a Common
Base
(CB ) stage
Ex.Calculate the Av for the cascode amplifier
  R B3   4.7KΩ 
V B1   Vcc   18V  4.95V
 R B1  R B2  R B3   4.7KΩ  5.6KΩ  6.8KΩ 
Vcc(R B2  R B3) 18v(5.6K Ω  4.7KΩ.
VB2    10.89V
R B1  R B2  R B3 5.6KΩ  4.7KΩ  6.8KΩ

using:V B1  V BE  IER E  0
V B1  V BE 4.95  0.7
IE    3.86mA
RE 1.1KΩ
26mv 26mV
re    6.74Ω
Ie 3.86mA
  Rc  re
AV1    1
re  re
Rc 1.8KΩ
AV2    267.29
re 6.74KΩ sdsdsdsds

AVT  (AV1)(AV2)  267.29(1)  267.29

Darlington Connection
- A super beta transistor
-The composite transistor acts as a single unit with a current gain
that the product of the current gain of the individual transistor.

 D  1  2

if

1   2  
D   2
What current gain is provided by a darlington connection of
two identical transistor each having a current gain of   200

 D   2  2002
 D  40,000
DC Bias of a darlington circuit

Vcc  I B RB VBe  I E RE  0
Vcc  I B RB VBe  ( 1)I B RE  0
Vcc VBE  I B (RB  ( 1)RE  0
VCC VBE
IB 
RB  B RE
VB  VE VBE
I E   D 1 I B
VE  I E RE
Calculate the dc bias voltage and current I B , I C , VC , VE

VCC  VBE 18  1.6

IB  
RB  BD RE 3.3M   8000 390
I B  2.55A
I C  I E    D  1 I B   8000  1 2.55A
 D  8000 I C  20.403mA
VBE  1.6V VE  I E RE   20.403mA 390
VE  7.957V
VC  VCC  I C RC
 VCC  I C  0 
 VCC  18V
AC equivalent circuit

- For a darlington emitter-follower the ac input signal is

applied to the base of the darlington transistor through
capacitor C1. with the ac output Vo obtained from the
emitter through capacitor Cr
- The darlington transistor is replaced by an ac equivalent
circuit composed of an input resistance, ri and an output
current source B D I B
 D IB

VC  I B ri  VO  0
VO  I B RE   D I E RE  0
VO  I B  RE   D RE 
VO  I B  RR 1   D  
VO  I B  D RE
V i  I B ri  V o  0
V i  I B ri  I B R E  D

Vi  I B  ri  R E  D 
Vi
 ri  R E  D
IB If ri is so small if not
Z i  R B //( r i  R E  D ) given = 0
Io  I o  I B 
Ai        D RB
Ii  I B  I i  Ai 
Io  IB   D IB  D RE  RB
Io
 D 
Ii
IB R
 B
Ii R B   ri  R E  D 
 DRB
Ai 
ri   D R E  R B
 D  8000
VBE  1.6V

Calculate the input impedance if ri  5k

Zi  3.3M //  5k  (8k )(390)
Zi  1.61M

(8k )(7.3M)
Ai 
8k (390)  3.3M
Ai  4112
 Vo I B  D RE
Av  
Vi I B  ri   D RE 
 D RE
Av 
ri   D RE
if ri is not given  0
Av  1

Calculate Av
8000(390)
Av 
5k  (8000)(390)
A v  0.998
 Feedback Pair
by KVL :
V CC  I C R C  V EB  I B R B  0
V CC   1  2 I B R C  V EB  I B R B  0
V CC  V EB   1  2 I B R C  I B R B
1  140
 2  180 V CC  V EB  I B  R B   1  2 R C 
V CC  V EB
I B1 
R B   1 2 RC

I C 1   1 I B 1  I E 1

I C 2   2 I B 2  I E 2

I C  I E 1  I C 2  I C 1  I C 2
Calculate the dc bias current and voltages
VCC  VEB 18  .7
I B1  
RB   D RC 2 M  (140)(180)(75)
I B1  4.465A

I C1  I B 2  1 I B1  140(4.465 )
I C1  625.1A

I C 2  180 625.1A
I C 2  112 .518mA

I C  I C1  I C 2  625.1A  112 .518mA

I C  113 .143mA
 Vo  V\CC  I C RC
( dc )

 18  (113.143mA)(75)
Vo  9.51V
( dc )

Vi  VEB  Vo  0
( dc )

Vi  Vo  VEB
( dc )

 9.51  0.7
Vi  8.81V
( dc )
AC Operation

1 I B1 2I B2

V o   I C R C   2 I B 2   1 I B 1 R C

V o   1  2 I B 1   1 I B 1 R C

  I B 1  1   2  1 R C
 I B 1  1  2 R C 
V o  I B 2  2 R C

V o
  1  2 R C
I B1
Z i   1  2 R C // R B
 I o   2 I B 2   1 I B1  I B1
  2  1 I B1   1 I B1  I B1
 I B1   2  1   1  1
 I B 1   1   2  1   1
 I B1   1 2  1
I o  I B1 1 2
Io
  1 2
I B1
IB RB Io I B
 Ai  
I i RB  Z i I B Ii

1  2 RB
Ai  Vi  Vo  I B ri , Vo  Vi  I B ri
RB  Z i

Vo I B 1 2 RC
AV  
Vi I B 1 2 RC  I B ri
1 2 RC
AV 
1 2 RC  ri
 Calculate the ac circuit values of Zi ,
Zo and Av and Ai assume that ri =
1  140 3kΩ
 2  180 Z i  (140)(180)(75) // 2M
Z i  971.72 K
ri 3 K
Zo  
(140)(180) (140)(180)
Z o  119.048

180(140)(2M)
Ai   16959.88
2M  971.29 K

(140)(180)(750)
AV   0.9998
(140)(180)(750)  3K
Differential Amplifier Circuit
-If an output signal is applied to either input with the other
input connected to ground, the operator is referred to as
“single ended”.

-If two opposite polarity input signals are applied, the operation
is referred to as “double-ended”.

-If the same input is applied to both inputs, the operator is

called “common mode”.

-In double ended operation two input signals are applied the
difference of the inputs resulting in outputs from both
collectors due to the difference of the signals applied is both
input.
- In common-mode operation, the common-input signal results
in opposite signals to each collector, these signals canceling so
that the resulting output signal is zero.

- The main future of the differential amplifier is the very large

gain when opposite signals are applied to the inputs as
compared to the very small gain resulting common inputs.
 Common-mode rejection ratio
- ratio of the difference gain to common gain DC bias.

 VEE  I E RE  VE  0
IE
IC  VEE  VE
2 IE 
RE
VB  0
VE  VB  VBE
VE  VBE
VE  0.7

VC  VCC  I C RC
IE
VC  VCC  RC
2
Solve for Ie and Vc

9  (0.7)
IE 
3.3K
I E  2.515mV

2.515m
VC  9  (3.3K )
2
VC  4.096V
Single Ended

1 I B1 2I B2

I B1  I B 2  I B
ri 1  ri 2  ri
ri  Z i   re
Vi  I B ri  I B ri  0 I C  I B
Vi  2 I B ri  0 VO  I C RC
IB 
Vi VO   I B RC
2ri Vi
VO   RC
2ri
VO  RC
AV  
Vi 2ri
RC
AV 
2re
Calculate the single ended output
voltage = Vo
VEE  VE
IE 
RE
9  0 .7
IE   193.02A
43K
I E 193.02
IC  
2 2
I C  96.51mA

26mV
re   269.39
96.51mA
47 K
AV   87.23
2(269.39)
Vo  AV Vi
Vo  87.23(2mV )
Vo  174.56mV
Low Frequency Reponse- BJT
Amplifier
• Effect of Cs on low frequency response
• Getting AC Equivalent
• Effect of Cc on the Low Frequency Response
• Can be establish for each capacitive element and the
frequency at which the output voltage drops to 0.707 of its
maximum value

Low Frequency Response

• -3db drop in gain from the midband level when
f=f an RC network will determine the low-frequency
cut-off frequency for a BJT transistor, f will be
• Example.
– Determine the lower out off frequency using:
– Solution:
 OP-AMP BASICS
• A very high gain differential amplifier with very high input
ompedance and low output impedance.

1. Provide voltage amplitude amplitude changes

2. Oscillators
3. Filter circuits
4. Instrumentation circuit
• Single-ended input (mode)
– Results when the input signal is connected to one
input with the order input connected to the ground.
• Differential mode, two opposite-polarity(out of phase
signals are appliedto the inputs. Refered as double-
ended).
• Common mode input voltage range
– Range of input voltages which, when applied to both
inputs will not cause clipping or other output
distortion.

• Input offset voltage

– Differential dc voltage required between the inputs to
force the output to zero volts.

• Input offset voltage drift

– Specifies how much change occurs in the input offset
voltage for each degree change in temperature.
• Input bias current
– DC current required by the inputs of the amplifier to
properly operate the first stage.

• Input impedance ( Differential input impedance )

– Total resistance between the inverting and non-
inverting inputs.
• Input offset current
– Difference of the input bias currents.
• Output impedance
– Resistance viewed from the output terminal.
• Double Ended Differential Input
• Double Ended output
• Common Mode Operation
– Two inputs one equally amplified and since they result
in opposite polarity signals at the output, these signals
cancel and results in 0V output.
• CMR ( Common Mode Rejection )
– Amplifier the difference signal while rejecting the
common signal at the two inputs.
Common and Differential Mode Operation

• Differential Inputs
– difference of the two signals.

• Common Input
– Average of the sum of the two signals.
• Output Voltage
• CMMR – Common Mode Rejection Ratio
• The output for Vo
• Example.
– Determine the output voltage of an op-amp for input
voltage of Vi=150μV, Vi2=140μV. The amplifier has a
differential gain of Ad= 4000 and CMRR is
(a)100
(b)10^5
Solution:
• Slew Rate
– Maximum rate of change of the output voltage in
response to a step input voltage.
• Negative Feedback
– The inverting (-) input effectively makes the
feedback signal 180 degrees out of phase with the
input signal.
• Closed-Loop Voltage Gain, Acl
– Voltage gain of an op-amp with external feedback.

• Non-Inverting Amplifier
– Op-amp connected in a closed-loop configuration.
• Example.
– Determine the gain of the amplifier. The open-loop
voltage gain of the op-amp is 100,000.
– Solution:
• Voltage Follower
– A special case of a non-inverting amplifier where all of
the output voltage is fed back to the inverting (-) input
by a straight connection.
• Inverting Amplifier
– Configuration where there is a controlled amount of
voltage gain.
• Example.
– Given the op-amp configuration determine the value
of Rf required to produce a closed-loop voltage gain
of -100.
– Solution:
• Impedance of Non-Inverting Amplifier
– Input impedance
– Output impedance
• Example.
– Determine the input and output impedance of the
amplifier . The op-amp datasheet gives Zin=2MΩ,
Zout=75Ω and Acl= 200,000.
– Solution:
 BASIC OP-AMP CIRCUITS
• Comparator
– To determine when an input voltage exceeds a
certain level the (-) inverting input is grounded to
produce a zero level and that the input signal voltage
is applied to the non-inverting (+) input.
• Non-Zero Level Detection

– The zero level detector can be modified to detect

voltages other than zero by connecting a fixed
reference voltage source to the (-) inverting input.
• Example. The input signal is applied to the comparator
circuit make a sketch of the output showing its proper
relationship to the input signal. Assume the maximum
output levels of the op-amp are 12V.
• Summing Amplifier
– Has two or more inputs, its output voltage is
proportional to the negative of the algebraic sum of its
input voltages.
• Summing Amplifier with Unity Gain
• Example.
– Determine the output voltage.
• Summing Amplifier with Gain Greater than Unity.

Since
• Example.
– Determine the output voltage for the summing
amplifier.
– Solution :
• Averaging Amplifier
– A summing amplifier can be make to produce the
mathematical average of the input voltages. This is
done by setting the ratio equal to the reciprocal of
the number of inputs(n).
• Example.
– Show that the amplifier produces an output whose
magnitude is the mathematical average of the input
voltages.
– Solution :
• Scaling Adder

– Example. Determine the weight of each input and the

output voltage.
• Solution:
• Multiple-Stage Gain
• Example
– Determine the output voltage using the circuit for
resistor components of value Rf = 470kΩ, R1= 4.3kΩ,
R2 = 33kΩ, and R3 = 38kΩ for an input of 80μΩ
• Voltage Subtraction
• Example.
– Determine the output for the circuit with components
Rf= 1MΩ, R1= 100kΩ, and R3= 500kΩ.

solution:
 Submitted by:

Octavo, Antonio
Pasquile, Ronald
Pineda, John
Ricarde, Julius Clarrence Ricarde B.
Rogador, Mark
Trinanes, Nomeer

EC32FB1