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Table Of Contents

Describing Logic Circuits Algebraically
Circuits containing Inverters
Evaluating Logic Circuit Outputs
Determining Output Level from a Diagram
Implementing Circuits from Boolean Expression
Boolean Theorems
Multivariable Theorems
DeMorgan's Theorem
Example
Three Variables DeMorgan's Theorem
Universality of NAND & NOR Gates
Alternate Logic Gate Representations
Concept of Active Logic Levels:
Boolean Function
Operator Precedence
Boolean Function Truth Table
Minterm
Maxterm
Minterms and Maxterms for 3 Variables
Minterm Boolean Expression
Maxterm Boolean Expression
Literal
Express Boolean Functions in Minterms
Conversion to Minterms
Express Boolean Functions in Maxterms
Boolean Function Manipulation
Boolean Function Manipulation Example
QUINE-McCLUSKEY MINIMIZATION
Minimization Technique
Prime Implicants Table
Logic
Binary Adder
Half Adder
Binary Addition
Full Adder
Logic for Full Adder
Circuit-SUM
Circuit-CARRY
Carry-Look-Ahead Adder
Look-Ahead Carry Generator
MSI Adder
4-bit Addition
8-bit Addition
Subtractor
Half Subtractor
Symbol
X Y D B
Full Subtractor
X Y Bin D Bout
Parallel Binary Subtractor
Comparator
Magnitude Comparator
Logic For A > B
Y A>B=A3B3’+S3A2B2’+S3S2A1B1’+S3S2S1A0B0’
Logic For A < B
Y A<B=A3 ’B3+S3A2 ’B2+S3S2A1 ’ B1+S3S2S1A0 ’ B0
4-bit Comparator Logic Circuit
MSI: 7485 4-bit Magnitude Comparator
Comparison of 4-bit Numbers
Comparison of 8 - bit Numbers
Decoder
3-to-8 Decoder
3-to-8 Decoder Logic Circuit
2-to-4 Decoder with Output Enable
Implement Logic Function with Decoder
X Y Z C S
MSI Decoders
Logic Symbol
74LS138 3-to-8 Decoder
Implement Logic Function with74LS138
4-to-16 Decoder
Binary Encoders
Octal-to-Binary Encoder
I0 I1 I2 I3 I4 I5 I6 I7 Y2 Y1 Y0
Priority Encoder
74148 8-to-3 Priority Encoder
16-to-4 Priority Encoder
Multiplexer
2x1 MUX
Design of a 2:1 Mux
B A S Y
Kmap
Circuit
MSI MUX
16-to-1 MUX
Larger Multiplexers
8-to-1 multiplexer from Smaller MUX
16-to-1 multiplexer from 4:1 mux
Quadruple 2-to-1 MUX
Quad 2-to-1 MUX
Implementing Functions Multiplexers
3-variable Function Using 8-to-1 mux
3-variable Function Using 4-to-1 mux
Truth Table
Select i X Y Z F Mux Input i
Example for logic function implementation using MUX
De-multiplexers
1-to-4 De-multiplexer
S1S0F0F1F2F3
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Unit 1

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Published by: umaa6 on Jun 13, 2011
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