Phn I (3 im)

Cu 1:
Xc nh bng phn vng a ch cho cc tn hiu chn chip ( CSx ) ng vi mch gii m a ch
sau:
Cu 2:
Xc nh bng phn vng a ch cho cc tn hiu chn chip ( CSx ) ng vi mch gii m a ch
sau:
1

U1

A11
A12
A13
A15
A14

12

Y0

Y1

Y2

Y3

U2 D
11

13

G 1

74LS08

G 2A

G 2B

Y4
Y5
Y6
Y7

U2 A
3

15
14

13

74LS08
U2 B

11

CS1

10
9

CS2
CS3

CS4

10
6

12

U2 C

CS 0

74LS08

74LS08

74LS138

Cu 3:
Xc nh bng phn vng a ch cho cc tn hiu chn chip ( CSx ) ng vi mch gii m a ch
sau:
A12
A13
A14
A15

1
2
3
6
4
5

A
B
C
G 1
G 2A
G 2B
74LS138

Y
Y
Y
Y
Y
Y
Y
Y

0
1
2
3
4
5
6
7

1
1
1
1
1
1
9
7

5
4
3
2
1
0

/C S 0
/C S 1
1

/C S 2

7408
4

12

7408
9

10

11

13

/C S 3

7408

7408

Cu 4:
Xc nh bng phn vng a ch cho cc tn hiu chn chip ( CSx ) ng vi mch gii m a ch
sau:

4
6

12

7408
9
8

10
A12
A13
A14
A15

+5V

1
2
3
6
4
5

A
B
C
G 1
G 2A
G 2B

Y
Y
Y
Y
Y
Y
Y
Y

1
1
1
1
1
1
9
7

0
1
2
3
4
5
6
7

5
4
3
2
1
0

11

13

/C S 0

7408

7408
1
3

2
/C S 2
/C S 3

/C S 1

7408

74LS138

Cu 5:
Xc nh bng phn vng a ch cho cc tn hiu chn chip ( CSx ) ng vi mch gii m a ch
sau:

A14

A15

A11
A12
A13

1
2
3

6
4
5

A
B
C

Y
Y
Y
Y
Y
Y
Y
Y

G 1
G 2A
G 2B

74 08

0
1
2
3
4
5
6
7

1
1
1
1
1
1
9
7

5
4
3
2
1
0

/CS1
/CS2
/CS3
/CS4

74 LS 13 8

Cu 6:
Xc nh bng phn vng a ch cho cc tn hiu chn chip ( CSx ) ng vi mch gii m a ch
sau:
A8
A9
A10

1
2
3

A11

6
4
5

A12
A13
A14
A15

A
B
C

15
14
13
12
11
10
9
7

Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7

G1
G2A
G2B

/CS0
/CS1
/CS2
/CS3
/CS4
/CS5
/CS6
/CS7

74LS138

Cu 7:
Xc nh bng phn vng a ch cho cc tn hiu chn chip ( CSx ) ng vi mch gii m a ch
sau:
A10
A11
A12
A13
A14
A15

1
2
3
6
4
5

A
B
C
G1
G2A
G2B

Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7

15
14
13
12
11
10
9
7

/CS0
/CS1
/CS3
/CS3

74HC138

Cu 8:
Dng vi mch 74138 v cc cng logic cn thit thit k mch gii m a ch cho kit 8051 vi 1
chip RAM 16KB v 2 chip RAM 8KB. Xc nh r vng a ch cho mi chip.
Cu 9:
Dng vi mch 74138 v cc cng logic cn thit thit k mch gii m a ch cho kit 8051 vi 2
chip RAM 8KB v 2 chip RAM 4KB. Xc nh r vng a ch cho mi chip.

Cu 10:
a. Hy v bng a ch (bng phn vng a ch) b nh cho 4 chip RAM, mi chip 2KB, bit a
ch bt u l C000H.
b. Hy thit k mch gii m a ch cho 4 chip RAM ny dng IC 74138 v cc cng logic cn
thit.
Cu 11:
Thit k mch gii m a ch to tn hiu chn chip cho cc b m I/O hai chiu s dng IC
74245 theo bng phn vng a ch sau:
Tn I/O
a ch

I/O0
F000H

I/O1
F001H

I/O2
F002H

I/O3
F003H

I/O4
F004H

I/O5
F005H

I/O6
F006H

I/O7
F007H

S chn v bng chn tr ca IC 74245.

Cu 12:
a. Hy v bng a ch (bng phn vng a ch) b nh cho 4 chip RAM, mi chip 2KB, bit a
ch bt u l 4000H.
b. Hy thit k mch gii m a ch cho 4 chip RAM ny ch dng 1 IC 74138.
Cu 13:
a. Hy v bng a ch (bng phn vng a ch) b nh cho 4 chip RAM, mi chip 2KB, bit a
ch bt u l 2000H.
b. Hy thit k mch gii m a ch cho 4 chip RAM ny ch dng 1 IC 74138.
Cu 14:
a. Hy v bng a ch (bng phn vng a ch) b nh cho 4 chip RAM, mi chip 2KB, bit a
ch bt u l 4000H.
b. Hy thit k mch gii m a ch cho 4 chip RAM ny ch dng 1 IC 74138.
Cu 15:
Thit k mch gii m a ch dng IC 74138 to tn hiu chn chip cho cc b nh RAM theo bng
phn vng a ch sau:
Tn hiu chn chip

Vng a ch

(tch cc mc 0)

(Hex)

/CS0

0000H 0FFFH

/CS1

1000H 1FFFH

/CS2

2000H 3FFFH

/CS3

4000H 7FFFH

Cu 16:
S dng IC 74138 v cc cng logic cn thit thit k mch gii m a ch to tn hiu chn chip
(tch cc mc thp) theo bng phn vng a ch sau (khng quan tm n c tnh truy xut):
Tn hiu chn chip
CS0
CS1
CS2
CS3

Vng a ch
8000H 83FFH
8400H 87FFH
8800H 8BFFH
8C00H 8FFFH

Cu 17:
S dng IC 74138 v cc cng logic cn thit thit k mch gii m a ch to tn hiu chn chip
(tch cc mc thp) theo bng phn vng a ch sau (khng quan tm n c tnh truy xut):
Tn hiu chn chip
CS0
CS1
CS2

Vng a ch
2000H 23FFH
2400H 27FFH
2800H 2BFFH

Cu 18:
Thit k mch gii m a ch to tn hiu chn chip cho PPI 8255 theo bng phn vng a ch sau:
Port
a ch

A
Fxx0H

B
Fxx1H

C
Fxx2H

Control
Fxx3H

Cu 19:
S dng IC 74138 v cc cng logic cn thit thit k mch gii m a ch to tn hiu chn chip
(tch cc mc thp) theo bng phn vng a ch sau (khng quan tm n c tnh truy xut):
Tn hiu chn chip
CS0
CS1
CS2
CS3

Vng a ch
2000H 23FFH
2400H 27FFH
2800H 2BFFH
2C00H 2FFFH

Cu 20:
Thit k mch gii m a ch to tn hiu chn chip (tch cc mc thp) cho cc b nh RAM theo
bng phn vng a ch:
Tn hiu chn chip
CS0
CS1
CS2
Cu 21:

Vng a ch
0000H 3FFFH
4000H 7FFFH
8000H BFFFH

Mt s kit MCU8051 c cu hnh nh sau:

1 RAM d liu ngoi 16KB

1 PPI 8255 m rng I/O

1 b cht 8-bit dng IC 74573 ni vi ng vo ca DAC0808

1 b ADC0809 nhn 8 knh analog vo

IC

Tn hiu chn chip

Vng a ch
c tnh truy xut
RAM
/CS0
/RD, /WR
0000H 3FFFH
PPI 8255
/CS5
/RD, /WR
4xx0H 4xx3H
Cht DAC
/CS6
5xxxH
/WR
ADC
/CS7
/RD, /WR
6xx0H 6xx7H
Dng IC 74138 v cc cng logic cn thit thit k mch gii m a ch cho kit trn.
Cu 22:
Mt s kit MCU8051 c cu hnh nh sau:
1 RAM d liu ngoi 8KB
1 PPI 8255 m rng I/O
1 b cht 8-bit dng IC 74573 ni vi ng vo ca DAC0808
1 b ADC0809 nhn 8 knh analog vo
IC

Tn hiu chn chip

Vng a ch
c tnh truy xut
RAM
/CS0
/RD, /WR
0000H 1FFFH
PPI 8255
/CS5
/RD, /WR
2xx0H 2xx3H
Cht DAC
/CS6
3xxxH
/WR
ADC
/CS7
/RD, /WR
4xx0H 4xx7H
Dng IC 74138 v cc cng logic cn thit thit k mch gii m a ch cho kit trn.
Cu 23:
Thit k mch gii m a ch to tn hiu chn chip cho 4 RAM 16KB. Xc nh r vng a ch
cho mi RAM.
Cu 24:
Dng vi mch 74138 v cc cng logic cn thit thit k mch gii m a ch cho kit 8051 vi 1
chip RAM 16KB v 2 chip RAM 8KB. Xc nh r vng a ch cho mi chip.
Cu 25:
Thit k mch gii m a ch to tn hiu chn chip (tch cc mc thp) cho cc b nh RAM theo
bng phn vng a ch:
Tn hiu chn chip
CS0
CS1
CS2
CS3

Vng a ch
0000H 0FFFH
1000H 2FFFH
3000H 6FFFH
7000H EFFFH

Cu 26:
Thit k mch gii m a ch to tn hiu chn chip cho PPI 8255 theo bng phn vng a ch sau:

Port
a ch

A
Cxx0H

B
Cxx1H

C
Cxx2H

Control
Cxx3H

Cu 27:
Dng vi mch 74138 v cc cng logic cn thit thit k mch gii m a ch cho kit 8051 vi 2
chip RAM 16KB v 2 chip RAM 8KB. Xc nh r vng a ch cho mi chip.
Cu 28:
S dng IC 74138 v cc cng logic cn thit thit k mch gii m a ch to tn hiu chn chip
(tch cc mc thp) theo bng phn vng a ch sau (khng quan tm n c tnh truy xut):
Tn hiu chn chip
CS0
CS1
CS2
CS3

Vng a ch
4000H 43FFH
4400H 47FFH
4800H 4BFFH
4C00H 4FFFH

Cu 29:
Xc nh bng phn vng a ch cho cc tn hiu chn chip ( CSx ) ng vi mch gii m a ch
sau:
1

U1

A11
A12
A13
A15
A14

12

Y0

Y1

Y2

Y3

U2 D
11

13

G 1

74LS08

G 2A

G 2B

Y4
Y5
Y6
Y7

U2 A
3

15
14

13

74LS08
U2 B

11

CS1

10
9

CS2
CS3

CS4

10
6

12

U2 C

CS 0

74LS08

74LS08

74LS 138

Cu 30:
Xc nh bng phn vng a ch cho cc tn hiu chn chip ( CSx ) ng vi mch gii m a ch
sau:
A12
A13
A14
A15

1
2
3
6
4
5

A
B
C
G 1
G 2A
G 2B
74LS138

Y
Y
Y
Y
Y
Y
Y
Y

0
1
2
3
4
5
6
7

1
1
1
1
1
1
9
7

5
4
3
2
1
0

/C S 0
/C S 1
1

2
7408
4

12

7408
9

7408

11

13
8

10

Cu 31:

/C S 2

7408

/C S 3

Xc nh bng phn vng a ch cho cc tn hiu chn chip ( CSx ) ng vi mch gii m a ch
sau:
4
6

12

7408
9
8

10
A12
A13
A14
A15

+5V

1
2
3
6
4
5

A
B
C
G 1
G 2A
G 2B

Y
Y
Y
Y
Y
Y
Y
Y

0
1
2
3
4
5
6
7

1
1
1
1
1
1
9
7

5
4
3
2
1
0

11

13

/C S 0

7408

7408
1
3

2
/C S 2
/C S 3

/C S 1

7408

74LS138

Cu 32:
Mt s kit MCU8051 c cu hnh nh sau:

1 RAM d liu ngoi 8K 6264

1 PPI 8255 m rng I/O

1 b cht 8-bit dng IC 74573 ni vi ng vo ca DAC0808

1 b ADC0809 nhn 8 knh analog vo

IC

Tn hiu chn chip

Vng a ch
c tnh truy xut
RAM
/CS0
/RD, /WR
0000H 1FFFH
PPI 8255
/CS1
2xxxH
/RD, /WR
Cht DAC
/CS2
3xxxH
/WR
ADC
/CS3
/RD, /WR
4xx0H 4xx7H
Dng IC 74138 v cc cng logic cn thit thit k mch gii m a ch cho kit trn.
Cu 33:
Mt s kit MCU8051 c cu hnh nh sau:

1 RAM d liu ngoi 16K

1 PPI 8255 m rng I/O

1 b cht 8-bit dng IC 74573 ni vi ng vo ca DAC0808

1 b ADC0809 nhn 8 knh analog vo

IC
Tn hiu chn chip
Vng a ch
c tnh truy xut
RAM
/CS0
/RD, /WR
0000H 3FFFH
PPI 8255
/CS1
/RD, /WR
4xx0H 4xx3H
Cht DAC
/CS2
5xxxH
/WR
ADC
/CS3
/RD, /WR
6xx0H 6xx7H
Dng IC 74138 v cc cng logic cn thit thit k mch gii m a ch cho kit trn.
Cu 34:
Mt s kit MCU8051 c cu hnh nh sau:

1 RAM d liu ngoi 8K 6264

1 PPI 8255 m rng I/O

1 b cht 8-bit dng IC 74573 ni vi ng vo ca DAC0808

1 b ADC0809 nhn 8 knh analog vo

IC
Tn hiu chn chip
Vng a ch
c tnh truy xut
RAM
/CS0
/RD,
/WR
0000H 1FFFH
PPI 8255
/CS1
/RD, /WR
2xx0H 2xx3H
Cht DAC
/CS2
3xxxH
/WR
ADC
/CS3
/RD, /WR
4xx0H 4xx7H
Dng IC 74138 v cc cng logic cn thit thit k mch gii m a ch cho kit trn.
Cu 35:
Xc nh bng phn vng a ch cho cc tn hiu chn chip ( CSx ) ng vi mch gii m a ch
sau:

A14

A15

A11
A12
A13
3

74 08

1
2
3
6
4
5

A
B
C
G 1
G 2A
G 2B

Y
Y
Y
Y
Y
Y
Y
Y

0
1
2
3
4
5
6
7

1
1
1
1
1
1
9
7

5
4
3
2
1
0

/CS1
/CS2
/CS3
/CS4

74 LS 13 8

Cu 36:
Mt s kit MCU8051 c cu hnh nh sau:

1 RAM d liu ngoi 8K 6264

1 PPI 8255 m rng I/O

1 b cht 8-bit dng IC 74573 ni vi ng vo ca DAC0808

1 b ADC0809 nhn 8 knh analog vo

IC
Tn hiu chn chip
Vng a ch
c tnh truy xut
RAM
/CS0
/RD,
/WR
0000H 1FFFH
PPI 8255
/CS1
2xxxH
/RD, /WR
Cht DAC
/CS2
3xxxH
/WR
ADC
/CS3
/RD, /WR
4xx0H 4xx7H
Dng IC 74138 v cc cng logic cn thit thit k mch gii m a ch cho kit trn.
Cu 37:
Thit k mch gii m a ch dng IC 74138 v cc cng logic cn thit to tn hiu chn chip cho
cc b nh RAM theo bng phn vng a ch sau:
Tn hiu chn chip
(tch cc mc 0)
/CS0
/CS1
/CS2
/CS3
Cu 38:

Vng a ch
(Hex)
0000H 0FFFH
1000H 1FFFH
2000H 3FFFH
4000H 7FFFH

Thit k mch gii m a ch to tn hiu chn chip cho 4 RAM 16KB. Xc nh r vng a ch
cho mi RAM.
Cu 39:
Xc nh bng phn vng a ch cho cc tn hiu chn chip ( CSx ) ng vi mch gii m a ch
sau:
1

U1

A11
A12
A13
A15
A14

12

1
2
3

A
B
C

U2 D
11

13

6
4

74LS08

G 1
G 2A
G 2B

74LS 138

Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7

U2 A
3

15
14

13

11

CS1

10
9

CS2
CS3

CS4

74LS08

U2 C
8

10
6

12

74LS08
U2 B

74LS08

CS 0