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MICROCHIP PIC12F629/675/PIC16F630/676 PIC12F629/675/PIC16F630/676 Memory Programming This document includes the 4.4 Hardware Requirements programming specifications for the The PIC12F620/675/PIC16F630/676 requires one following devices: power supply for Vou (5.0V) and one for VPP (12V). Ae + PICT2F675 + PICIEFE76 12 Programming Mode The Programming mode for the PIC12F6201676/ PIC16F630/676 allows programming of user program 1.0 PROGRAMMING THE memory, data memory, special locations used for ID PIC12F629/675/PIC16F630/676 and the Configuration Word register. The PIC12F629/675/PIC 16F630/676 is programmed using a serial method, The Serial mode will allow the PIC12F62016751PIC16F630/676 to be programmed while in the user’s system. This allows for increased design flexibiliy. This programming specification apples to PIC12F629/675/PIC 16F630/676 devices in s re iy 3 i all packages. FIGURE 11: __8-PIN DIAGRAMS FOR PIC12F629/675, PDIP, SOIC voo ef]: al} vss ceamickvoscictkn ef]2 § rf] cracimsacsrosr craTGoscuctKout= {js & af} cPricnwcsecux caiictRives —ef]4” 5f]—+ crerockumricour voo—efft el} vss crumicxtoscucixn =f rf] oroanocwstcsroxr GPaANSTTBOSCZCLKOUT =—e[]3 D6 [}+—~ GPYANICINYvmerACSPCLK craiveTRivee offs sf]— crainarockunricout DFN, DFN-S veo — J vse GPemickioscHciKIn ——~ 2 | aporcinsacseDar Pict2r629 J» GPHcinatesPcLK + cp2rtockvevticour opsmiBioscacKouT —~ [3 (cpa fTETRve0 —= veo —~ J ve 7]-—~ cpoianoicinsncspoaT 6] — sPuansicinvicseoux | cP2anateckuinticour GPSTICKUOSCHICLKIN =» play PIci2F6rs GPAIANATIBIOSC2ICLKOUT —= paffetRiven —» | © 2005 Microchip Technology Ine. S41191D-page 1 PIC12F629/675/PIC16F630/676 FIGURE 1-2: 14-PIN DIAGRAMS FOR PIC16F630/676 PDIP, SOIC, TSSOP Voo—[]1 14[])—Vvss RASITICKVOSCIICLKIN =r{]2___ 13[}+—> RAOICINVICSPOAT RAATIGIOSC2ICLKOUT —{]3. 3 12/}+ RATICINSICSPCLK RAGMCLRVVe2—=f]4 & 11[]}++ RAZCOUTITOCKIINT Ress & t0f]-—-Roo Ret-—[Js * frei Ro3a-—{\7 alle Rc2 voo—-]1 ~~ 14t-—ves RASITICKVOSC1/CLKIN=—+{]2__13[}+—= RAQ/ANOICIN*/ICSPDAT RASTIGIOSC2IANSICLKOUT —[]3 & 12{}— RAT/ANTICIN

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