INSTRUCTION PLAN

Class : 3 /4 B.Tech ECE (2013-14) V-semester Subject & code : Computer Architecture & Organization(EUREC 506)

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TOPIC Register Transfer And Micro Operations Register Transfer Language Bus and Memory Transfer Three state Bus Buffers Arithmetic Micro Operations(Binary Adder and Adder Subtractor ) Binary Incrementer & Arithmetic Circuit Logic Micro Operations Shift Micro Operations Arithmetic Logic Shift Unit Basic Computer Organization Instruction Codes Computer Registers Computer Instructions Timing And Control Instruction Cycle Register Reference Instructions Memory Reference Instructions Input-Output Configurations & Instructions Program Interrrupt Interrupt Cycle Complete Computer Description CPU Organization Introduction General Register Organization (Control Word) Examples of Microoperations Stack Organization Reverse Polish Notation & Evaluation of Arithmetic Expressions Instruction Formats Addressing Modes Data Transfer And Manipulation Program Control Reduced Instruction Set Computer(RISC) Complex Instruction Set Computer(CISC) (RISC & CISC Characteristics) Berkeley RISC I Micro programmed Control Control Memory Address Sequencing (Mapping of Instruction) Subroutines Microinstruction Format Vertical And Horizontal Microinstructions Micro Program Example Design Of Control Unit Memory and I/O Organization

NO.OF HOURS 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 1 2 1 1 1 1 1 1 1 2 1 2 1 1 1 1 1 1 2 2

Memory Hierarchy Main Memory(RAM & ROM Chips) Memory Address Map Associative Memory(Match Logic) Read & Write Operation Cache Memory(Mapping) Cache Initialization Virtual Memory(Address Mapping) Page Replacement Peripheral Devices Input / Output Interface I/O Vs Memory Bus Asynchronous Data Transfer Strobe Control & Hand Shaking Modes of Transfer Priority Interrupt Direct Memory Access
TOTAL NO OF HOURS

2 1 1 1 1 1 1 1 1 2 1 1 1 1 1 1 2 63

ECE A: Smt. D. Madhavi ECE B: Mr. K. Srinivas ECE C: Mr K. Srinivas ECE D: Mr Y. Madhu Babu ECE E: Mr . K. Chaitanya

B.Tech. (ECE) V Semester COMPUTER ARCHITECTURE & ORGANIZATION Course Code: EUREC506 Category: CE Credits: 3 week Department: ECE

Hours: 5 per

UNIT-I Register Transfer and Micro operations: Register transfer language - register transfer bus and memory transfers arithmetic micro operations - logic micro operations shift micro operations arithmetic logic shift unit UNIT-II Basic Computer Organization: Instruction Course Codes computer registers computer instructions timing and control instruction cycle memory reference instructions input-output and interrupt complete computer description UNIT-III CPU Organization: Introduction - general register organization stack organization instruction formats addressing modes data transfer and manipulation program control Reduced Instruction Set Computer(RISC) Complex Instruction Set Computer(CISC) UNIT-IV Micro programmed Control: Control memory address sequencing microinstruction format vertical and horizontal microinstructions micro program example design of control unit UNIT-V Memory and I/O Organization: Memory hierarchy main memory associative memory cache memory virtual memory, Peripheral devices input/output interface asynchronous data transfer modes of transfer priority interrupt direct memory access . 3

Text Book: 1. Mano, Morris M., Computer System Architecture, 3rd ed. Pearson Education Asia, 2000. References: 1. Stallings W., Computer Organization and Architecture, 6th ed. Pearson Education Asia, 2000 2. Hamacher, V.C., Z.G.Vranesic, and S.G.Zaky, Computer Organization, 3rd ed, McGraw-Hill, 1990

Class : 3 /4 B.Tech ECE (2013-14) V-semester Subject & code : Computer Architecture & Organization(EUREC 506)

Objective of the course

The main objective of this course is to introduce the main concepts and components of computer organization and architecture. This course covers all the basics required to understand about the various advanced Computer architecture concepts (the computers which incorporate Data level Parallelism). It concentrates on the design concepts of a digital computer i.e how to choose the required elements for designing an application oriented processor (DSP,VLSI etc.,) in an optimistic way.

Out Come of the Course

The students will get familiarized with basic architecture & organization of computer, main functional units of a computer, design principles and various organizational issues of a digital computer. 4

The students will gain enough knowledge in assembly language programming and will be able to write efficient programs for the given problem. They will be able to design an optimal computer with required configuration to meet the demands of their application.