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Very low power consumption: 200 A Wide common-mode (up to VCC+) and differential voltage ranges Low input bias and offset currents Output short-circuit protection High input impedance JFET input stage Internal frequency compensation Latch up free operation High slew rate: 3.5 V/s D SO-8 (plastic micropackage) N DIP8 (plastic package)
Description
The TL062, TL062A and TL062B devices are high-speed JFET input single operational amplifiers. Each of these JFET input operational amplifiers incorporates well matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset currents, and a low offset voltage temperature coefficient. Pin connections (top view)
1 2 3 4
+ +
8 7 6 5
1 2 3 4 5 6 7 8
- Output 1 - Inverting input 1 - Non-inverting input 1 - VCC- Non-inverting input 2 - Inverting input 2 - Output 2 - VCC+
September 2012
This is information on a product in full production.
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Schematic diagram
1
Figure 1.
Schematic diagram
Schematic diagram
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Value 18 15 30 680
Unit V V V mW
duration(4)
Infinite C
(5) (6)
Tstg Rthja
Storage temperature range Thermal resistance junction-to-ambient , SO-8 DIP8 Thermal resistance junction-to-case(5),(6) SO-8 DIP8 HBM: human body model(7) 125 85 40 41 900 150 1.5
C/W
Rthjc
C/W V V kV
ESD
MM: machine
model(8) model(9)
1. All voltage values, except differential voltage, are with respect to the zero reference level (ground) of the supply voltages where the zero reference level is the midpoint between VCC+ and VCC-. 2. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 volts, whichever is less. 3. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. 4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded. 5. Short-circuits can cause excessive heating and destructive dissipation. 6. Rth are typical values. 7. Human body model: 100 pF discharged through a 1.5 k resistor between two pins of the device, done for all couples of pin combinations with other pins floating. 8. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 ), done for all couples of pin combinations with other pins floating. 9. Charged device model: all pins plus package are charged together to the specified voltage and then discharged directly to ground.
Table 2.
Symbol VCC Toper
Operating conditions
Parameter Supply voltage range Operating free air temperature range -40 to +105 TL062I, AI, BI TL062C, AC, BC Unit V 0 to +70 C
6 to 36
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Electrical characteristics
3
Table 3.
Symbol
Electrical characteristics
VCC = 15 V, Tamb = +25 C (unless otherwise specified)
TL062I Parameter Min. Input offset voltage (RS = 50 ) Tamb = +25 C Tmin Tamb Tmax Temperature coefficient of input offset voltage (R S = 50 ) Input offset current(1) Tamb = +25 C Tmin Tamb Tmax Input bias current(1) Tamb = +25 C Tmin Tamb Tmax Input common mode voltage range Output voltage swing (R L = 10 k) Tamb = +25 C Tmin Tamb Tmax Large signal voltage gain RL = 10 k , Vo = 10 V, Tamb = +25 C Tmin Tamb Tmax Gain bandwidth product , CL = 100 pF Tamb = +25 C, RL =10 k Input resistance Common mode rejection ratio RS = 50 Supply voltage rejection ratio RS = 50 Supply current, no load Tamb = +25 C, no load, no signal Channel separation Av = 100, Tamb = 25 C Total power consumption Tamb = +25 C, no load, no signal Slew rate , CL= 100 pF, Av = 1 Vi = 10 V, RL = 10 k 1.5 80 80 11.5 Typ. Max. Min. Typ. Max. TL062C Unit
Vio
6 9
15 20
mV
DVio
10
V/C
Iio
pA nA pA nA V
Iib
30 +15 -12 27
30 +15 -12 27
Vicm
Vopp
20 20
20 20
Avd
4 4
3 3
V/mV
MHz dB dB A dB mW V/s
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Electrical characteristics
tr
0.2
0.2
Kov en
10 42
10 42
%
nV ----------Hz
1. The input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive. Pulse techniques must be used that will maintain the junction temperature as close to the ambient temperature as possible.
Table 4.
Symbol
Vio
3 7.5
3 5
mV
DVio
10
10
V/C
Iio
100 3 200 7
pA nA nA
Iib
30 +15 -12 27
30 +15 -12 27
Vicm
Vopp
20 20
20 20
Avd
4 4
4 4
V/mV
1 1012 86 95 80 80
1 1012 86 95
MHz dB dB
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Supply current, no load Tamb = +25 C, no load, no signal Channel separation Av = 100, Tamb = +25 C Total power consumption Tamb = +25 C, no load, no signal Slew rate Vi = 10 V, RL = 10 k, CL = 100 pF, Av = 1 Rise time , CL = 100 pF, Av = 1 Vi = 20 mV, R L = 10 k Overshoot factor (see Figure 15) , CL = 100 pF, Av = 1 Vi = 20 mV, R L = 10 k Equivalent input noise voltage RS = 100 , f = 1 kHz
1. The input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive. Pulse techniques must be used that will maintain the junction temperature as close to the ambient temperature as possible.
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Electrical characteristics
Figure 2.
Maximum peak-to-peak output voltage (V)
Figure 3.
RL = 10 k Tamb = + 25 C
VCC = +/- 15 V RL = 10 k
Figure 4.
Figure 5.
Maximum peak-to-peak output voltage (V)
Frequency (Hz)
Figure 6.
Figure 7.
Large signal differential voltage amplification and phase shift versus frequency
10
6 10
VCC = +/- 5 V to +/- 15 V RL = 2 k Tamb = + 25 C Differential voltage amplification (left scale) Phase shift (right scale)
7 4
105 4 10
3 10 102
101 1
45
90 135
2
VCC = +/- 15 V RL = 10 k
10
100
1k
10k
100k
1M
180 10M
Frequency (Hz)
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Electrical characteristics
Figure 8.
250
150 100
Tamb = + 25 C
200
200
150 100
VCC = +/- 15 V
50
No signal no load
50
No signal no load
0
0 2 4 6 8 10 12 14
16
-75
-50
-25
25
50
75
100 125
25 20 15 10 5 0 -75
-50
-25
25
50
75
100
125
-50
-25
25
50
75
100
125
Figure 12. Normalized unity gain bandwidth slew rate and phase shift versus temperature
Normalized unity-gain bandwidth and slew rate
1.3
1.2 1.1
Unity-gain bandwidth (left scale)
100
1.02 1.01
1.03
VCC = +/- 15 V
10
1 0.1
1 0.9
0.8
VCC = +/- 15 V RL = 10 k f = B1 for phase shift
1 0.99
0.98
-25
25
50
0.01 -50
-25
25
50
75
100
125
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Electrical characteristics
28
Input
24 20 16 12 8 4 0 -4
Overshoot 90%
2
0 -2 -4 -6 0 2 4 6
VCC = +/- 15 V RL = 10 k CL = 100 pF Tamb = + 25 C
Output
10
0.2
0.4
0.6
0.8
12
14
Time (s)
Time (s)
90 80 70 60 50 40 30
20 10 0 10
40
100
400 1k
4k
10k
40k 100k
Frequency (Hz)
10 k
-
1 k
eI
eo
1/2 TL062
eI
1/2 TL062 RL
eo
CL = 100 pF
RL = 10 k
CL = 100 pF
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Typical applications
Typical applications
1 k
1/2
TL062 88.4 k
6 cos t 1 k
1N 4148
18 k (1) +15 V
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Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
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Package information
5.1
Table 5.
Symbol Min. A A1 A2 b b2 c D E E1 e eA eB L 2.92 0.38 2.92 0.36 1.14 0.20 9.02 7.62 6.10
Millimeters Typ. Max. 5.33 0.015 3.30 0.46 1.52 0.25 9.27 7.87 6.35 2.54 7.62 10.92 3.30 3.81 0.115 4.95 0.56 1.78 0.36 10.16 8.26 7.11 0.115 0.014 0.045 0.008 0.355 0.300 0.240 Min.
Note:
Dimensions "D" and "E1" do not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.25 mm in total (both sides). Datum plane "H" coincides with the bottom of the lead, where the lead exits the body.
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Package information
5.2
Table 6.
Symbol Min. A A1 A2 b c D E E1 e h L L1 k ccc 0 0.25 0.40 0.10 1.25 0.28 0.17 4.80 5.80 3.80
Millimeters Typ. Max. 1.75 0.25 0.004 0.049 0.48 0.23 4.90 6.00 3.90 1.27 0.50 1.27 1.04 8 0.10 1 0.010 0.016 5.00 6.20 4.00 0.011 0.007 0.189 0.228 0.150 Min.
0.019 0.010 0.193 0.236 0.154 0.050 0.020 0.050 0.040 8 0.004 0.197 0.244 0.157
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Ordering information
Ordering information
Table 7. Order codes
Temperature range Package Packaging Marking TL062IN TL062AIN TL062BIN 062I 062AI 062BI TL062CN TL062ACN TL062BCN 062C 062AC 062BC
Tube
TL062ID/IDT TL062AID/AIDT TL062BID/BIDT TL062CN TL062ACN TL062BCN 0 C, +70 C TL062CD/CDT TL062ACD/ACDT TL062BCD/BCDT
SO-8
DIP8
Tube
SO-8
Revision history
Table 8.
Date 28-Mar-2001
27-Jul-2007
15-Mar-2010
21-Sep-2012
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