Gio trnh Vi iu khin

Tng quan v vi iu khin MCS-51

Chng 1: TNG

QUAN V VI IU KHIN MCS-51

Chng ny gii thiu tng quan v h vi iu khin MCS-51(ch yu trn AT89C51): cu trc phn cng, s chn, cc thanh ghi, c tnh lp trnh v cc c tnh v in.

1. Gii thiu
H vi iu khin MCS-51 do Intel sn xut u tin vo nm 1980 l cc IC thit k cho cc ng dng hng iu khin. Cc IC ny chnh l mt h thng vi x l hon chnh bao gm cc cc thnh phn ca h vi x l: CPU, b nh, cc mch giao tip, iu khin ngt. MCS-51 l h vi iu khin s dng c ch CISC (Complex Instruction Set Computer), c di v thi gian thc thi ca cc lnh khc nhau. Tp lnh cung cp cho MCS-51 c cc lnh dng cho iu khin xut / nhp tc ng n tng bit. MCS-51 bao gm nhiu vi iu khin khc nhau, b vi iu khin u tin l 8051 c 4KB ROM, 128 byte RAM v 8031, khng c ROM ni, phi s dng b nh ngoi. Sau ny, cc nh sn xut khc nh Siemens, Fujitsu, cng c cp php lm nh cung cp th hai. MCS-51 bao gm nhiu phin bn khc nhau, mi phin bn sau tng thm mt s thanh ghi iu khin hot ng ca MCS-51.

2. Vi iu khin AT89C51
AT89C51 l vi iu khin do Atmel sn xut, ch to theo cng ngh CMOS c cc c tnh nh sau: 4 KB PEROM (Flash Programmable and Erasable Read Only Memory), c kh nng ti 1000 chu k ghi xo Tn s hot ng t: 0Hz n 24 MHz 3 mc kha b nh lp trnh 128 Byte RAM ni. 4 Port xut /nhp I/O 8 bit. 2 b Timer/counter 16 Bit. 6 ngun ngt. Giao tip ni tip iu khin bng phn cng. 64 KB vng nh m ngoi 64 KB vng nh d liu ngoi. Cho php x l bit. 210 v tr nh c th nh v bit. 4 chu k my (4 s i vi thch anh 12MHz) cho hot ng nhn hoc chia.

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C cc ch ngh (Low-power Idle) v ch ngun gim (Power-down).

Ngoi ra, mt s IC khc ca h MCS-51 c thm b nh thi th 3 v 256 byte RAM ni.

2.1.

S
P0.0 P0.7 P2.0 P2.7

VCC VSS

PORT0DRIVERS

PORT2DRIVERS

RAMADDR REGISTER

RAM

PORTO LATCH

PORT2 LATCH

ROM

PROGRAM ADDRREGISTER STACK POINTER PCON SCON TMOD TL0 TL2* IE TCON TH1 RCAP2H* IP PROGRAM COUNTER PC INCREAMENTER

ACC

BUFFER

T2CON* TH0 TMP2 B REGISTER ALU TMP1 TL1 TH2*

RCAP2L* SBUF

IINTERRUPTSERIALPORTAND TIMERBLOCKS

PSW PSEN ALE EA RST INSTRUCTION REGISTER TIMINGAND CONTROL

DPTR

PORT1LATCH

PORT3LATCH

OSC PORT1 DRIVER PORT3 DRIVER

XTAL1

XTAL2

P1.0 P1.7

P3.0 P3.7

Note: * for Timer 2 only

Hnh 1.1 S khi ca AT89C51

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AT89C51 gm c 40 chn, m t nh sau:

40 39 38 37 36 35 34 33 32 1 2 3 4 5 6 7 8 19 18 31 9 AT89C51 P2.0/A8 P2.1/A9 P2.2/A10 P2.3/A11 P2.4/A12 P2.5/A13 P2.6/A14 P2.7/A15 21 22 23 24 25 26 27 28 10 11 12 13 14 15 16 17 30 29

P0.0/AD0 P0.1/AD1 P0.2/AD2 P0.3/AD3 P0.4/AD4 P0.5/AD5 P0.6/AD6 P0.7/AD7 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 XTAL1 XTAL2 EA/VPP RST

Hnh 1.2 S chn ca AT89C51 Port 0: Port 0 l port c 2 chc nng cc chn 32 39 ca AT89C51: Chc nng IO (xut / nhp): dng cho cc thit k nh. Tuy nhin, khi dng chc nng ny th Port 0 phi dng thm cc in tr ko ln (pull-up), gi tr ca in tr ph thuc vo thnh phn kt ni vi Port. Khi dng lm ng ra, Port 0 c th ko c 8 ng TTL. Khi dng lm ng vo, Port 0 phi c set mc logic 1 trc . Chc nng a ch / d liu a hp: khi dng cc thit k ln, i hi phi s dng b nh ngoi th Port 0 va l bus d liu (8 bit) va l bus a ch (8 bit thp).

Ngoi ra khi lp trnh cho AT89C51, Port 0 cn dng nhn m khi lp trnh v xut m khi kim tra (qu trnh kim tra i hi phi c in tr ko ln).

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20

GND

VCC

P3.0/RXD P3.1/TXD P3.2/INT0 P3.3/INT1 P3.4/T0 P3.5/T1 P3.6/WR P3.7/RD ALE/PROG PSEN

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Port 1: Port1 (chn 1 8) ch c mt chc nng l IO, khng dng cho mc ch khc (ch trong 8032/8052/8952 th dng thm P1.0 v P1.1 cho b nh thi th 3). Ti Port 1 c in tr ko ln nn khng cn thm in tr ngoi. Port 1 c kh nng ko c 4 ng TTL v cn dng lm 8 bit a ch thp trong qu trnh lp trnh hay kim tra. Khi dng lm ng vo, Port 1 phi c set mc logic 1 trc . Port 2: Port 2 (chn 21 28) l port c 2 chc nng: Chc nng IO (xut / nhp): c kh nng ko c 4 ng TTL. Chc nng a ch: dng lm 8 bit a ch cao khi cn b nh ngoi c a ch 16 bit. Khi , Port 2 khng c dng cho mc ch IO. Khi dng lm ng vo, Port 2 phi c set mc logic 1 trc . Khi lp trnh, Port 2 dng lm 8 bit a ch cao hay mt s tn hiu iu khin. Port 3: Port 3 (chn 10 17) l port c 2 chc nng: Chc nng IO: c kh nng ko c 4 ng TTL. Khi dng lm ng vo, Port 3 phi c set mc logic 1 trc . Chc nng khc: m t nh bng 1.1 Bng 1.1: Chc nng cc chn ca Port 3 Bit Tn P3.0 RxD P3.1 TxD P3.3 INT1 P3.4 T0 P3.5 T1 P3.6 WR P3.7 RD Chc nng Ng vo port ni tip Ng ra port ni tip Ngt ngoi 1 Ng vo ca b nh thi 0 Ng vo ca b nh thi 1 Tn hiu iu khin ghi d liu ln b nh ngoi. Tn hiu iu khin c t b nh d liu ngoi.

P3.2 INT0 Ngt ngoi 0

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Ngun: Chn 40: VCC = 5V 20% Chn 20: GND PSEN (Program Store Enable):

PSEN (chn 29) cho php c b nh chng trnh m rng i vi cc ng dng s dng ROM ngoi, thng c ni n chn OC (Output Control) ca ROM c cc byte m lnh. PSEN s mc logic 0 trong thi gian AT89C51 ly lnh.Trong qu trnh ny, PSEN s tch cc 2 ln trong 1 chu k my.
M lnh ca chng trnh c c t ROM thng qua bus d liu (Port0) v bus a ch (Port0 + Port2). Khi 8951 thi hnh chng trnh trong ROM ni, PSEN s mc logic 1. ALE/ PROG (Address Latch Enable / Program): ALE/ PROG (chn 30) cho php tch cc ng a ch v d liu ti Port 0 khi truy xut b nh ngoi. ALE thng ni vi chn Clock ca IC cht (74373, 74573). Cc xung tn hiu ALE c tc bng 1/6 ln tn s dao ng trn chip v c th c dng lm tn hiu clock cho cc phn khc ca h thng. Xung ny c th cm bng cch set bit 0 ca SFR ti a ch 8Eh ln 1. Khi , ALE ch c tc dng khi dng lnh MOVX hay MOVC. Ngoi ra, chn ny cn c dng lm ng vo xung lp trnh cho ROM ni ( PROG ). EA /VPP (External Access) :
EA (chn 31) dng cho php thc thi chng trnh t ROM ngoi. Khi ni chn 31 vi Vcc, AT89C51 s thc thi chng trnh t ROM ni (ti a 8KB), ngc li th thc thi t ROM ngoi (ti a 64KB).

Ngoi ra, chn EA c ly lm chn cp ngun 12V khi lp trnh cho ROM. RST (Reset): RST (chn 9) cho php reset AT89C51 khi ng vo tn hiu a ln mc 1 trong t nht l 2 chu k my. X1,X2: Ng vo v ng ra b dao ng, khi s dng c th ch cn kt ni thm thch anh v cc t nh hnh v trong s . Tn s thch anh thng s dng cho AT89C51 l 12Mhz.
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Gi tr C1, C2 = 30 pF 10 pF Hnh 1.3 S kt ni thch anh 2.2. nh th chu k my

Mt chu k my bao gm 6 trng thi (12 xung clock). Mt trng thi bao gm 2 phn ng vi 12 xung clock : Phase 1 v Phase 2. Nh vy, mt chu k my bao gm 12 xung clock c biu din t S1P1 n S6P2 (State 1, Phase 1 State 6, Phase 2). Chu k ly lnh v thc thi lnh m t nh hnh 1.4. Tn hiu cht a ch ALE tch cc 2 ln trong mt chu k my (trong khong thi gian S1P2 n S2P1 v t S4P2 n S5P1). T tn s xung ti chn ALE bng 1/6 tn s thch anh. i vi cc lnh thc thi trong 1 chu k: Lnh 1 byte: c thc thi ti thi im S1P2 sau khi m lnh c cht vo thanh ghi lnh ti S1P1. Lnh 2 byte: byte th 2 c c ti thi im S4 v s c thc thi ti thi im S4. i vi cc lnh thc thi trong 2 chu k: Qu trnh ly lnh thc hin ti thi im S1 ca chu k u tin (byte m lnh 1). Nu lnh c nhiu hn 1 byte th s c ly cc thi im tip theo ging nh cc lnh thc thi trong 1 chu k.

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Hnh 1.4 Chu k lnh

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2.3.

T chc b nh

B nh trong

B nh ngoi B nh chng trnh 64 KB 0000h FFFFh iu khin bng PSEN B nh d liu 64 KB 0000h FFFFh iu khin bng RD v WR

ROM4KB 0000h0FFFh RAM128byte 00h7Fh SFR 80h0FFh

Hnh 1.5 - Cc vng nh trong AT89C51 B nh ca h MCS-51 c th chia thnh 2 phn: b nh trong v b nh ngoi. B nh trong bao gm 4 KB ROM v 128 byte RAM (256 byte trong 8052). Cc byte RAM c a ch t 00h 7Fh v cc thanh ghi chc nng c bit (SFR) c a ch t 80h 0FFh c th truy xut trc tip. i vi 8052, 128 byte RAM cao (a ch t 80h 0FFh) khng th truy xut trc tip m ch c th truy xut gin tip (xem thm trong phn tp lnh). B nh ngoi bao gm b nh chng trnh (iu khin c bng tn hiu PSEN ) v b nh d liu (iu khin bng tn hiu RD hay WR cho php c hay ghi d liu). Do s ng a ch ca MCS-51 l 16 bit (Port 0 cha 8 bit thp v Port 2 cha 8 bit cao) nn b nh ngoi c th gii m ti a l 64KB. 2.3.1. T chc b nh trong B nh trong ca MCS-51 gm ROM v RAM. RAM bao gm nhiu vng c mc ch khc nhau: vng RAM a dng (a ch byte t 30h 7Fh v c thm vng 80h 0FFh ng vi 8052), vng c th a ch ha tng bit (a ch byte t 20h 2Fh, gm 128 bit c nh a ch bit t 00h 7Fh), cc bank thanh ghi (t 00h 1Fh) v cc thanh ghi chc nng c bit (t 80h 0FFh).

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Cc thanh ghi chc nng c bit (SFR Special Function Registers): Bng 1.2 Cc thanh ghi chc nng c bit a ch byte F8h F0h E8h E0h D8h D0h C8h C0h B8h B0h A8h A0h 98h 90h 88h 80h
IP P3 IE P2 SCON P1 TCON P0 TMOD SP TL0 DPL TH0 DPH TL1 TH1 AUXR CKCON PCON SBUF BRL BDRCON SADDR SADEN PSW (T2CON) (RCAP2L) (RCAP2H) (TL2) (TH2) ACC B

C th nh a ch bit

Khng nh a ch bit

Cc thanh ghi c th nh a ch bit s c a ch bit bt u v a ch byte trng nhau. V d nh: thanh ghi P0 c a ch byte l 80h v c a ch bit bt u t 80h (ng vi P0.0) n 87h (ng vi P0.7). Chc nng cc thanh ghi ny s m t trong phn sau.

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RAM ni: chia thnh cc vng phn bit: vng RAM a dng (30h 7Fh), vng RAM c th nh a ch bit (20h 2Fh) v cc bank thanh ghi (00h 1Fh).
a ch byte 7F 30 2F 2E 2D 2C 2B 2A 29 28 27 26 25 24 23 22 21 20 1F 18 17 10 1F 08 07 00 7F 77 6F 67 5F 57 4F 47 3F 37 2F 27 1F 17 0F 07 7E 76 6E 66 5E 56 4E 46 3E 36 2E 26 1E 16 0E 06 7D 75 6D 65 5D 55 4D 45 3D 35 2D 25 1D 15 0D 05 7C 74 6C 64 5C 54 4C 44 3C 34 2C 24 1C 14 0C 04 7B 73 6B 63 5B 53 4B 43 3B 33 2B 23 1B 13 0B 03 7A 72 6A 62 5A 52 4A 42 3A 32 2A 22 1A 12 0A 02 79 71 69 61 59 51 49 41 39 31 29 21 19 11 09 01 78 70 68 60 58 50 48 40 38 30 28 20 18 10 08 00 Vng RAM a dng a ch bit Chc nng

Vng c th nh a ch bit

Bank 3 Bank 2 Cc bank thanh ghi Bank 1 Bank thanh ghi 0 ( mc nh cho R0-R7)

Hnh 1.6 S phn b RAM ni RAM a dng: RAM a dng c 80 byte t a ch 30h 7Fh c th truy xut mi ln 8 bit bng cch dng ch a ch trc tip hay gin tip. Cc vng a ch thp t 00h 2Fh cng c th s dng cho mc ich nh trn ngoi cc chc nng cp nh phn sau. RAM c th nh a ch bit: Vng a ch t 20h 2Fh gm 16 byte (= 128 bit) c th thc hin ging nh vng RAM a dng (mi ln 8 bit) hay thc hin truy xut mi ln 1 bit bng cc lnh

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x l bit. Vng RAM ny c cc a ch bit bt u ti gi tr 00h v kt thc ti 7Fh. Nh vy, a ch bt u 20h (gm 8 bit) c a ch bit t 00h 07h; a ch kt thc 2Fh c a ch bit t 78h Fh. Cc bank thanh ghi: Vng a ch t 00h 1Fh c chia thnh 4 bank thanh ghi: bank 0 t 00h 07h, bank 1 t 08h 0Fh, bank 2 t 10h 17h v bank 3 t 18h 1Fh. Cc bank thanh ghi ny c i din bng cc thanh ghi t R0 n R7. Sau khi khi ng h thng th bank thanh ghi c s dng l bank 0. Do c 4 bank thanh ghi nn ti mt thi im ch c mt bank thanh ghi c truy xut bi cc thanh ghi R0 n R7. Vic thay i bank thanh ghi c th thc hin thng qua thanh ghi t trng thi chng trnh (PSW). Cc bank thanh ghi ny cng c th truy xut bnh thng nh vng RAM a dng ni trn. 2.3.2. T chc b nh ngoi MCS-51 c b nh theo cu trc Harvard: phn bit b nh chng trnh v d liu. Chng trnh v d liu c th cha bn trong nhng vn c th kt ni vi 64KB chng trnh v 64KB d liu. B nh chng trnh c truy xut thng qua chn PSEN cn b nh d liu c truy xut thng qua chn WR hay RD . Lu rng vic truy xut b nh chng trnh lun lun s dng a ch 16 bit cn b nh d liu c th l 8 bit hay 16 bit tu theo cu lnh s dng. Khi dng b nh d liu 8 bit th c th dng Port 2 nh l Port I/O thng thng cn khi dng ch 16 bit th Port 2 ch dng lm cc bit a ch cao. Port 0 c dng lm a ch thp/ d liu a hp. Tn hiu ALE tch byte a ch v a vo b cht ngoi. Trong chu k ghi, byte d liu s tn ti Port 0 va trc khi WR tch cc v c gi cho n khi WR khng tch cc.Trong chu k c, byte nhn c chp nhn va trc khi RD khng tch cc. B nh chng trnh ngoi c x l 1 trong 2 iu kin sau: Tn hiu EA tch cc ( = 0). Gi tr ca b m chng trnh (PC Program Counter) ln hn kch thc b nh.

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PCH: Program Counter High PCL: Program Counter Low DPH: Data Pointer High DPL: Data Pointer Low Hnh 1.7 Thc thi b nh chng trnh ngoi

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Kt ni phn cng khi thit k b nh ngoi m t nh sau:

ADDRESS BUS DATA BUS
U1 A8 A9 A10 A11 A12 A13 A14 A15 21 22 23 24 25 26 27 28 10 11 12 13 14 15 16 17 30 29 P2.0/A8 P2.1/A9 P2.2/A10 P2.3/A11 P2.4/A12 P2.5/A13 P2.6/A14 P2.7/A15 P3.0/RXD P3.1/TXD P3.2/INT0 P3.3/INT1 P3.4/T0 P3.5/T1 P3.6/WR P3.7/RD ALE/PROG PSEN P0.0/AD0 P0.1/AD1 P0.2/AD2 P0.3/AD3 P0.4/AD4 P0.5/AD5 P0.6/AD6 P0.7/AD7 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 XTAL1 XTAL2 EA/VPP RST AT89C51 39 38 37 36 35 34 33 32 1 2 3 4 5 6 7 8 19 18 31 9 D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7 2 3 4 5 6 7 8 9 11 1 U8 D0 D1 D2 D3 D4 D5 D6 D7 LE OE 74HC573 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 19 18 17 16 15 14 13 12 A0 A1 A2 A3 A4 A5 A6 A7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 10 9 8 7 6 5 4 3 25 24 21 23 2 26 27 1 22 20 28 U3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 OE/VPP CE VCC O0 O1 O2 O3 O4 O5 O6 O7 11 12 13 15 16 17 18 19 D0 D1 D2 D3 D4 D5 D6 D7

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ROM 27512

Hnh 1.8 Giao tip b nh chng trnh ngoi

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ADDRESS BUS DATA BUS

U4 A8 A9 A10 A11 A12 A13 A14 A15 21 22 23 24 25 26 27 28 10 11 12 13 14 15 16 17 30 29 P2.0/A8 P2.1/A9 P2.2/A10 P2.3/A11 P2.4/A12 P2.5/A13 P2.6/A14 P2.7/A15 P3.0/RXD P3.1/TXD P3.2/INT0 P3.3/INT1 P3.4/T0 P3.5/T1 P3.6/WR P3.7/RD ALE/PROG PSEN P0.0/AD0 P0.1/AD1 P0.2/AD2 P0.3/AD3 P0.4/AD4 P0.5/AD5 P0.6/AD6 P0.7/AD7 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 XTAL1 XTAL2 EA/VPP RST AT89C51 39 38 37 36 35 34 33 32 1 2 3 4 5 6 7 8 19 18 31 9 D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7 2 3 4 5 6 7 8 9 11 1 U7 D0 D1 D2 D3 D4 D5 D6 D7 LE OE 74HC573 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 19 18 17 16 15 14 13 12 A0 A1 A2 A3 A4 A5 A6 A7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 12 11 10 9 8 7 6 5 27 26 23 25 4 28 3 31 24 29 22 30 U6 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 OE WE CE1 CE2 RAM 62512 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 13 14 15 17 18 19 20 21 D0 D1 D2 D3 D4 D5 D6 D7

Tng quan v vi iu khin MCS-51

Hnh 1.9 Giao tip b nh d liu ngoi

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ADDRESS BUS DATA BUS

U5 A8 A9 A10 A11 A12 A13 A14 A15 21 22 23 24 25 26 27 28 10 11 12 13 14 15 16 17 30 29 P2.0/A8 P2.1/A9 P2.2/A10 P2.3/A11 P2.4/A12 P2.5/A13 P2.6/A14 P2.7/A15 P3.0/RXD P3.1/TXD P3.2/INT0 P3.3/INT1 P3.4/T0 P3.5/T1 P3.6/WR P3.7/RD ALE/PROG PSEN P0.0/AD0 P0.1/AD1 P0.2/AD2 P0.3/AD3 P0.4/AD4 P0.5/AD5 P0.6/AD6 P0.7/AD7 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 XTAL1 XTAL2 EA/VPP RST AT89C51 39 38 37 36 35 34 33 32 1 2 3 4 5 6 7 8 19 18 31 9 U11A 1 2 7408 3 D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7 2 3 4 5 6 7 8 9 11 1 U10 D0 D1 D2 D3 D4 D5 D6 D7 LE OE 74HC573 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 19 18 17 16 15 14 13 12 A0 A1 A2 A3 A4 A5 A6 A7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 12 11 10 9 8 7 6 5 27 26 23 25 4 28 3 31 24 29 22 30 U9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 OE WE CE1 CE2 RAM 62512 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 13 14 15 17 18 19 20 21 D0 D1 D2 D3 D4 D5 D6 D7

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Hnh 1.10 Giao tip b nh chng trnh v d liu ngoi dng chung

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B nh chng trnh ngoi: Qu trnh thc thi lnh khi dng b nh chng trnh ngoi c th m t nh hnh 1.7. Trong qu trnh ny, Port 0 v Port 2 khng cn l cc Port xut nhp m cha a ch v d liu. S kt ni vi b nh chng trnh ngoi m t nh hnh 1.8. Trong mt chu k my, tn hiu ALE tch cc 2 ln. Ln th nht cho php 74HC573 m cng cht a ch byte thp, khi ALE xung 0 th byte thp v byte cao ca b m chng trnh u c nhng ROM cha xut v PSEN cha tch cc, khi tn hiu ALE ln 1 tr li th Port 0 c d liu l m lnh. ALE tch cc ln th hai c gii thch tng t v byte 2 c c t b nh chng trnh. Nu lnh ang thc thi l lnh 1 byte th CPU ch c Opcode, cn byte th hai b qua. B nh d liu ngoi: B nh d liu ngoi c truy xut bng lnh MOVX thng qua cc thanh ghi xc nh a ch DPTR (16 bit) hay R0, R1 (8 bit). S kt ni vi b nh d liu ngoi m t nh hnh 1.9. Qu trnh thc hin c hay ghi d liu c cho php bng tn hiu RD hay

WR (chn P3.7 v P3.6).

B nh chng trnh v d liu dng chung: Trong cc ng dng pht trin phn mm xy dng da trn AT89C51, ROM s c lp trnh nhiu ln nn d lm h hng ROM. Mt gii php t ra l s dng RAM cha cc chng trnh tm thi. Khi , RAM va l b nh chng trnh va l b nh d liu. Yu cu ny c th thc hin bng cch kt hp chn RD v chn PSEN thng qua cng AND. Khi thc hin c m lnh, chn PSEN tch cc cho php c t RAM v khi c d liu, chn RD s tch cc. S kt ni m t nh hnh 1.10. 2.3.3. Gii m a ch Trong cc ng dng da trn AT89C51, ngoi giao tip b nh d liu, vi iu khin cn thc hin giao tip vi cc thit b khc nh bn phm, led, ng c, Cc thit b ny c th giao tip trc tip thng qua cc Port. Tuy nhin, khi s lng cc thit b ln, cc Port s khng thc hin iu khin. Gii php a ra l xem cc thit b ny ging nh b nh d liu. Khi , cn phi thc hin qu trnh gii m a ch phn bit cc thit b ngoi vi khc nhau. Qu trnh gii m a ch thng c thc hin thng qua cc IC gii m nh 74139 (2 -> 4), 74138 ( 3 -> 8), 74154 (4 -> 16). Ng ra ca cc IC gii m s c a ti chn chn chip ca RAM hay b m khi iu khin ngoi vi.

Phm Hng Kim Khnh

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2.4.

Cc thanh ghi chc nng c bit (SFR Special Function Registers)

2.4.1. Thanh ghi tch lu (Accumulator) Thanh ghi tch lu l thanh ghi s dng nhiu nht trong AT89C51, c k hiu trong cu lnh l A. Ngoi ra, trong cc lnh x l bit, thanh ghi tch lu c k hiu l ACC. Thanh ghi tch lu c th truy xut trc tip thng qua a ch E0h (byte) hay truy xut tng bit thng qua a ch bit t E0h n E7h. VD: Cu lnh: MOV A,#1 MOV 0E0h,#1 c cng kt qu. Hay: SETB ACC.4 SETB 0E4h cng tng t. 2.4.2. Thanh ghi B Thanh ghi B dng cho cc php ton nhn, chia v c th dng nh mt thanh ghi tm, cha cc kt qu trung gian. Thanh ghi B c a ch byte F0h v a ch bit t F0h F7h c th truy xut ging nh thanh ghi A. 2.4.3. Thanh ghi t trng thi chng trnh (PSW - Program Status Word) Thanh ghi t trng thi chng trnh PSW nm ti a ch D0h v c cc a ch bit t D0h D7h, bao gm 7 bit (1 bit khng s dng) c cc chc nng nh sau: Bng 1.3 Chc nng cc bit trong thanh ghi PSW Bit 7 6 5 4 3 Chc CY AC F0 RS1 RS0 nng 2 OV 1 0 P

CY (Carry): c nh, thng c dng cho cc lnh ton hc (C = 1 khi c nh trong php cng hay mn trong php tr) AC (Auxiliary Carry): c nh ph (thng dng cho cc php ton BCD). F0 (Flag 0): c s dng tu theo yu cu ca ngi s dng.

Phm Hng Kim Khnh

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RS1, RS0: dng chn bank thanh ghi s dng. Khi reset h thng, bank 0 s c s dng. Bng 1.4 Chn bank thanh ghi RS1 RS0 Bank thanh ghi 0 0 Bank 0 0 1 Bank 1 1 0 Bank 2 1 1 Bank 3 OV (Overflow): c trn. C OV = 1 khi c hin tng trn s hc xy ra (dng cho s nguyn c du). P (Parity): kim tra parity (chn). C P = 1 khi tng s bit 1 trong thanh ghi A l s l (ngha l tng s bit 1 ca thanh ghi A cng thm c P l s chn). V d nh: A = 10101010b c tng cng 4 bit 1 nn P = 0. C P thng c dng kim tra li truyn d liu. 2.4.4. Thanh ghi con tr stack (SP Stack Pointer) Con tr stack SP nm ti a ch 81h v khng cho php nh a ch bit. SP dng ch n nh ca stack. Stack l mt dng b nh lu tr dng LIFO (Last In First Out) thng dng lu tr a ch tr v khi gi mt chng trnh con. Ngoi ra, stack cn dng nh b nh tm lu li v khi phc cc gi tr cn thit. i vi AT89C51, stack c cha trong RAM ni (128 byte i vi 8031/8051 hay 256 byte i vi 8032/8052). Mc nh khi khi ng, gi tr ca SP l 07h, ngha l stack bt u t a ch 08h (do hot ng lu gi tr vo stack yu cu phi tng ni dung thanh ghi SP trc khi lu). Nh vy, nu khng gn gi tr cho thanh ghi SP th khng c s dng cc bank thanh ghi 1, 2, 3 v c th lm sai d liu. i vi cc ng dng thng thng khng cn dng nhiu n stack, c th khng cn khi ng SP m dng gi tr mc nh l 07h. Tuy nhin, nu cn, ta c th xc nh li vng stack cho MCS-51. 2.4.5. Con tr d liu DPTR (Data Pointer) Con tr d liu DPTR l thanh ghi 16 bit bao gm 2 thanh ghi 8 bit: DPH (High) nm ti a ch 83h v DPL (Low) nm ti a ch 82h. Cc thanh ghi ny khng cho php nh a ch bit. DPTR c dng khi truy xut n b nh c a ch 16 bit. 2.4.6. Cc thanh ghi port Cc thanh ghi P0 ti a ch 80h, P1 ti a ch 90h, P2, ti a ch A0h, P3 ti a ch B0h l cc thanh ghi cht cho 4 port xut / nhp (Port 0, 1, 2, 3). Tt c cc thanh ghi ny u cho php nh a ch bit trong a ch bit ca P0 t 80h 87h, P1 t 90h 97h, P2 t A0h A7h, P3 t B0h B7h. Cc a ch bit ny c th thay th bng ton t . V d nh: 2 lnh sau l tng ng:
Phm Hng Kim Khnh Trang 18

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SETB P0.0 SETB 80h 2.4.7. Thanh ghi port ni tip (SBUF - Serial Data Buffer) Thanh ghi port ni tip ti a ch 99h thc cht bao gm 2 thanh ghi: thanh ghi nhn v thanh ghi truyn. Nu d liu a ti SBUF th l thanh ghi truyn, nu d liu c c t SBUF th l thanh ghi nhn. Cc thanh ghi ny khng cho php nh a ch bit. 2.4.8. Cc thanh ghi nh thi (Timer Register) Cc cp thanh ghi (TH0, TL0), (TH1, TL1) v (TH2, TL2) l cc thanh ghi dng cho cc b nh thi 0, 1 v 2 trong b nh thi 2 ch c trong 8032/8052. Ngoi ra, i vi h 8032/8052 cn c thm cp thanh ghi (RCAP2L, RCAP2H) s dng cho b nh thi 2 (s tho lun trong phn hot ng nh thi). 2.4.9. Cc thanh ghi iu khin Bao gm cc thanh ghi IP (Interrupt Priority), IE (Interrupt Enable), TMOD (Timer Mode), TCON (Timer Control), T2CON (Timer 2 Control), SCON (Serial port control) v PCON (Power control). Thanh ghi IP ti a ch B8h cho php chn mc u tin ngt khi c 2 ngt xy ra ng thi. IP cho php nh a ch bit t B8h BFh. Thanh ghi IE ti a ch A8h cho php hay cm cc ngt. IE c a ch bit t A8h AFh. Thanh ghi TMOD ti a ch 89h dng chn ch hot ng cho cc b nh thi (0, 1) v khng cho php nh a ch bit. Thanh ghi TCON ti a ch 88h iu khin hot ng ca b nh thi v ngt. TCON c a ch bit t 88h 8Fh. Thanh ghi T2CON ti a ch C8h iu khin hot ng ca b nh thi 2. T2CON c a ch bit t C8h CFh. Thanh ghi SCON ti a ch 98h iu khin hot ng ca port ni tip. SCON c a ch bit t 98h 9Fh. Cc thanh ghi ni trn s c tho lun thm cc phn sau.

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Thanh ghi iu khin ngun PCON Thanh ghi PCON ti a ch 87h khng cho php nh a ch bit bao gm cc bit nh sau: Bit Chc nng Bng 1.5 Chc nng cc bit trong thanh ghi PCON 7 6 5 4 3 SMOD1 SMOD0 POF GF1 2 GF0 1 PD 0 IDL

SMOD1 (Serial Mode 1): = 1 cho php tng gp i tc port ni tip trong ch 1, 2 v 3. SMOD0 (Serial Mode 0): cho php chn bit SM0 hay FE trong thanh ghi SCON ( = 1 chn bit FE). POF (Power-off Flag): dng nhn dng loi reset. POF = 1 khi m ngun. Do , xc nh loi reset, cn phi xo bit POF trc . GF1, GF0 (General purpose Flag): cc bit c dnh cho ngi s dng. PD (Power Down): c xo bng phn cng khi hot ng reset xy ra. Khi bit PD = 1 th vi iu khin s chuyn sang ch ngun gim. Trong ch ny: Ch c th thot khi ch ngun gim bng cch reset. Ni dung RAM v mc logic trn cc port c duy tr. Mch dao ng bn trong v cc chc nng khc ngng hot ng. Chn ALE v PSEN mc thp. Yu cu Vcc phi c in p t nht l 2V v phc hi Vcc = 5V t nht 10 chu k trc khi chn RESET xung mc thp ln na.

IDL (Idle): c xo bng phn cng khi hot ng reset hay c ngt xy ra. Khi bit IDL = 1 th vi iu khin s chuyn sang ch ngh. Trong ch ny: Ch c th thot khi ch ngun gim bng cch reset hay c ngt xy ra. Trng thi hin hnh ca vi iu khin c duy tr v ni dung cc thanh ghi khng i. Mch dao ng bn trong khng gi c tn hiu n CPU. Chn ALE v PSEN mc cao.

Lu rng cc bit iu khin PD v IDL c tc dng chnh trong tt c cc IC h MSC-51 nhng ch c th thc hin c trong cc phin bn CMOS.

Phm Hng Kim Khnh

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2.5.

Cu trc port

a. Cu trc Port 0

b. Cu trc Port 1

c. Cu trc Port 2

d. Cu trc Port 3

Hnh 1.11 Cu trc cc Port ca AT89C51 Cu trc cc Port m t nh hnh v, mi port c mt b cht (SFR t P0 n P3), mt b m vo v b li ng ra. Port 0: Khi dng ch IO: FET ko ln tt (do khng c cc tn hiu ADDR v CONTROL) nn ng ra Port 0 h mch. Nh vy, khi thit k Port 0 lm vic ch IO, cn phi c cc in tr ko ln. Trong ch ny, mi chn ca Port 0 khi dng lm ng ra c th ko ti a 8 ng TTL (xem thm phn sink / source trong 2.7).

Khi ghi mc logic 1 ra Port 0, ng ra Q ca b cht (latch) mc 0 nn FET tt, ng ra Port 0 ni ln Vcc thng qua FET v c th ko xung mc 0 khi kt ni vi tn hiu ngoi. Khi ghi mc logic 0 ra Port 0, ng ra Q ca b cht mc 1 nn FET dn, ng ra Port 0 c ni vi GND nn lun mc 0 bt k ng vo. Do , c d liu ti Port 0 th cn phi set bit tng ng.

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Khi dng ch a ch / d liu: FET ng vai tr nh in tr ko ln nn khng cn thit k thm cc in tr ngoi.

Port 1, 2, 3: Khng dng FET m dng in tr ko ln nn khi thit k khng cn thit phi thm cc in tr ngoi. Khi dng ch IO, cch thc hot ng ging nh Port 0 (ngha l trc khi c d liu th cn phi set bit tng ng). Port 1, 2, 3 c kh nng sink / source dng cho 4 ng TTL.

2.6.

Hot ng Reset

thc hin reset, cn phi tc ng mc cao ti chn RST (chn 9) ca AT89C51 t nht 2 chu k my. S mch reset c th m t nh sau:
VCC R28 100 C20 0.1uF

RST RESET R27 8.2K

Hnh 1.12 S mch reset ca AT89C51 Sau khi reset, ni dung ca RAM ni khng thay i v cc thanh ghi thay i v gi tr mc nh nh sau: Bng 1.6 - Gi tr mc nh ca cc thanh ghi khi reset Thanh ghi Ni dung m chng trnh PC 0000h A, B, PSW, SCON, SBUF 00h SP 07h DPTR 0000h Port 0 n port 3 FFh IP XXX0 0000b IE 0X0X 0000b Cc thanh ghi nh thi 00h PCON (HMOS) 0XXX XXXXb PCON (CMOS) 0XXX 0000b

Phm Hng Kim Khnh

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2.7.

Cc vn khc

2.7.1. Dng g sink v so ource D Dng in si ink v sour rce l mt p phn quan tr rng khi thi it k cc mch in t. S khc nhau ca chng c c m t nh hnh 1.13.

n gia dng d sink v v source Hnh 1.13 Khc nhau T Trong AT89 9C51, Port 0 c dng g sink ca mi chn t ng ng n vi 8 ng g TTL cn n cc Port khc k c dn ng sink /sour rce tng ng vi 4 ng TTL. 2.7.2. Lp trnh t cho AT89C51 A 2.7.2. .1. Cc ch kho b nh ch hng trnh

Bng 1.7 Cc C ch kho chn ng trnh Ch Lp trnh h cc bit M t kho o LB1 LB2 2 LB3 1 U U U Khng kho o 2 P U U Khng cho php lnh MOVC ti b nh ch ng trnh n EA c ly mu v cht khi re eset, khng g ngoi, chn cho php lp trnh. 3 4 P P P P U P Ging ch 2 v kh ng cho ph p kim tra. Ging ch 3 v kh ng cho ph p thc thi ngoi. n

Trong AT89 T 9C51, c 3 bit kho (LB lock k bit) c th h c lp trnh (P program mmed) hay khng k (U unprogram mmed) cho php chn cc ch kho kh c nhau (bng 1.7).

Gio trnh Vi iu khin

Tng quan v vi iu khin MCS-51

2.7.2.2.

Lp trnh

Khi AT89C51 trng thi xo, tt c cc nh thng l 0FFh v c th c lp trnh. in p lp trnh c th l 5V hay 12V tu theo loi IC. in p lp trnh xc nh bng k hiu trn chip hay cc byte nhn dng khi xo chip (xem bng 1.8). Bng 1.8 Nhn dng in p lp trnh Vpp = 12V K hiu AT89C51 xxxx yyww Byte nhn dng (30h) = 1Eh (31h) = 51h (32h) = 0FFh Vpp = 5V AT89C51 xxxx-5 yyww (30h) = 1Eh (31h) = 51h (32h) = 05h

Lu rng AT89C51 c lp trnh theo tng byte nn phi thc hin xo tt c chip trc khi lp trnh. Qu trnh lp trnh cho AT89C51 c thc hin theo cc bc sau: Bc 1: t gi tr a ch ln ng a ch. Bc 2: t d liu ln ng d liu. Bc 3: t cc tn hiu iu khin tng ng (xem bng 1.9). Bc 4: t chn EA /VPP ln in p 12V (nu s dng in p lp trnh 12V). Bc 5: To mt xung ti chn ALE/ PROG (xem bng 1.9). Thng chu k ghi 1 byte khng vt qu 1.5 ms. Sau thay i a ch v lp li bc 1 cho n khi kt thc d liu cn lp trnh.

Bng 1.9 Cc tn hiu iu khin lp trnh Vpp P2.6 P2.7 P3.6 P3.7 Ch RST PSEN PROG Ghi m H L H/12V L H H H c m H L H H L L H H Ghi lock bit LB1 H L H/12V H H H H LB2 H L H/12V H H L L LB3 H L H/12V H L H L Xo chip H L H/12V H L L L c byte nhn dng H L H H L L L L Lu rng cc xung PROG i hi thi gian khng vt qu 1.5 ms, ch c ch xo chip cn xung 10ms. S mch lp trnh v kim tra cho AT89C51 m t nh hnh 1.14 v 1.15.

Phm Hng Kim Khnh

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Address 0000h 0FFFh

Xem bng 1.9

Hnh 1.14 S mch lp trnh cho AT89C51

Phm Hng Kim Khnh

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Address 0000h 0FFFh

Xem bng 1.9

Hnh 1.15 S mch kim tra cho AT89C51

Phm Hng Kim Khnh

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Cc dng tn hiu dng lp trnh cho AT89C51 c m t nh hnh 1.16 v 1.17.

Hnh 1.16 Dng sng lp trnh in p 12V

Hnh 1.17 - Dng sng lp trnh in p 5V

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Khi lp trnh, cc thng s v thi gian v in p c m t nh bng 1.10. Bng 1.10 Cc c tnh lp trnh v kim tra T = 0 700C, VCC = 5V 10% K M t hiu VPP (1) in p lp trnh IPP (1) Dng in lp trnh 1/tCLCL Tn s thch anh Khong thi gian t lc a ch n nh cho n tAVGL khi c th to xung PROG (xung mc thp) Khong thi gian gi li a ch sau khi chn tGHAX PROG ln mc cao Khong thi gian t lc d liu n nh cho n tDVGL khi c th to xung PROG (xung mc thp) Khong thi gian gi li d liu sau khi chn tGHDX PROG ln mc cao Khong thi gian t lc P2.7 (ENABLE) ln mc tEHSH cao n khi Vpp chuyn n gi tr in p lp trnh (5V/12V) Khong thi gian t lc Vpp chuyn ln gi tr tSHGL in p lp trnh n khi chn PROG xung mc thp tGHSL Khong thi gian t lc chn PROG ln mc cao (1) n khi Vpp chuyn xung gi tr in p thp tGLGH rng xung lp trnh tAVQV Khong thi gian t lc a a ch cho n lc (2) c th c d liu tELQV Khong thi gian t lc chn P2.7 (ENABLE) (2) xung mc thp n khi c th c d liu tEHQZ Khong thi gian t lc chn P2.7 (ENABLE) ln (2) mc cao n khi th ni ng d liu Khong thi gian t lc chn PROG ln mc cao tGHBL n khi chn P3.4 (BUSY) xung mc thp Chu k ghi byte tWC (1) Ch dng cho in p lp trnh 12V (2) Dng cho ch kim tra (Tham kho thm mt mch lp trnh cho AT89C51 ti Ph lc 3)

Min 11.5 3 48tCLCL 48tCLCL 48tCLCL 48tCLCL 48tCLCL 10

Max 12.5 1.0 24

n v V mA MHz

s 10 1 110 48tCLCL 48tCLCL 0 48tCLCL 1.0 2.0 s ms s s

Phm Hng Kim Khnh

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2.7.3. Cc c tnh ca AT89C51 2.7.3.1. c tnh DC

Bng 1.11 c tnh DC ca AT89C51 T = - 40 850C; VCC = 5V 20% K M t iu kin hiu VIL in p ng vo mc thp Tr EA VIL1 in p ng vo mc thp EA Tr XTAL1, VIH in p ng vo mc cao RST VIH1 in p ng vo mc cao XTAL1, RST in p ng ra mc thp VOL IOL = 1.6 mA (1) (Port 1,2,3) in p ng ra mc thp VOL1 IOL = 3.2 mA (1) (Port 0,ALE, PSEN ) VOH in p ng ra mc cao (Ports 1,2,3, ALE, PSEN ) in p ng ra mc cao (Port 0 trong ch a ch d liu a hp) Dng ng vo mc 0 (Port 1,2,3) Dng in xy ra khi chuyn mc logic t 1 xung 0 (P1, 2, 3) Dng in ng vo in tr ko xung ti ng Reset in dung ti cc chn Dng ti thiu ca ngun cung cp Ch ngun gim (2)
IOH = -60 A VCC = 5V 10%

Min -0.5 -0.5

0.2 VCC + 0.9

Max
0.2 VCC - 0.1 0.2 VCC - 0.3

n v V V V V V V V V V V V V

VCC + 0.5 VCC + 0.5 0.45 0.45

0.7 VCC

2.4 0.75 VCC 0.9 VCC 2.4 0.75 VCC 0.9 VCC -50 -650 10 50 300 10 20 5 100 40

VOH1

IOH = -800 A VCC = 5V 10%

IOH = -25 A IOH = -10 A

IOH = -300 A IOH = -80 A VIN = 0.45V VIN = 2V, VCC = 5V 10% 0.45 < VIN < VCC
Tn s = 1 MHz TA = 25C

IIL ITL ILI RRST CIO

A A A K pF mA mA A A

ICC

Ch thng 12 MHz Ch ngh 12 MHz VCC = 6V VCC = 3V

(1) ch thng, IOL xc nh nh sau: IOLmax ti mi chn l 10 mA.

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IOLmax ti mi port 8 bit: 26 mA cho Port 0 v 15 mA cho Port 1,2,3. IOLmax ti tt c cc ng vo: 71 mA. Nu IOL khng tho mn cc iu kin trn, in p VOL c th s ln hn gi tr trong bng 1.11 (2) in p Vcc ti thiu trong ch ngun gim l 2V. 2.7.3.2. c tnh AC
Thch anh 16 - 24 MHz

Bng 1.12 c tnh AC ca AT89C51 Thch anh 12 K MHz M t hiu Min Max 1/tCLCL Tn s thch anh tLHLL rng xung ALE 127 Khong thi gian t lc a ch n nh tAVLL 43 n khi ALE xung mc thp Khong thi gian gi tLLAX li a ch sau khi 48 ALE xung mc thp Khong thi gian t lc ALE xung mc tLLIV 233 thp n khi m lnh vo hp l Khong thi gian t lc ALE xung mc 43 tLLPL thp n khi PSEN xung mc thp 205 tPLPH rng xung PSEN Khong thi gian t lc PSEN xung tPLIV 145 mc thp n khi m lnh vo hp l Khong thi gian gi li m lnh sau tn tPXIX 0 hiu PSEN Khong thi gian t tAVIV lc t a ch n khi 312 m lnh vo hp l Khong thi gian th ni ng vo m lnh tPXIZ sau tn hiu PSEN
Phm Hng Kim Khnh

n v MHz ns ns

Min 0
2tCLCL-40

Max 24

tCLCL-13

tCLCL-20

ns

4tCLCL-65

ns

tCLCL-13
3tCLCL-20

ns ns 3tCLCL-45 ns

ns

5tCLCL-55

ns

tCLCL-10

ns

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tPXAV

tPLAZ tRLRH tWLWH tRLDV

tRHDX

tRHDZ

tLLDV

tAVDV

tLLWL

tAVWL

tQVWX

tQVWH tWHQX

Khong thi gian t tn hiu PSEN n khi a ch hp l Khong thi gian t lc PSEN xung mc thp n khi th ni a ch rng xung RD rng xung WR Khong thi gian t lc RD xung mc thp n khi d liu vo hp l Khong thi gian gi li d liu sau tn hiu RD Khong thi gian th ni d liu sau tn hiu RD Khong thi gian t lc ALE xung mc thp n khi d liu hp l Khong thi gian t lc t a ch n khi d liu hp l Khong thi gian t lc ALE xung mc thp n khi RD hay WR xung mc thp Khong thi gian t lc t a ch n khi RD hay WR xung mc thp Khong thi gian t lc d liu hp l n khi WR chuyn mc logic Khong thi gian t lc d liu hp l n khi WR ln mc cao Khong thi gian gi

75

tCLCL-8

ns

10 400 400 252

6tCLCL-100 6tCLCL-100

10

ns ns ns

5tCLCL-90

ns

97

2tCLCL-28

ns

517

8tCLCL-150

ns

585

9tCLCL-165

ns

200

300

3tCLCL-50

3tCLCL+50

ns

203

4tCLCL-75

ns

23

tCLCL-20

ns

433 33

7tCLCL-120

ns ns

tCLCL-20

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tRLAZ

tWHLH

li d liu sau tn hiu WR Khong thi gian t lc RD xung mc thp n khi th ni a ch Khong thi gian t lc RD hay WR ln mc cao n khi ALE ln mc cao

ns ns ns ns ns ns ns ns

43

123

tCLCL-20

tCLCL+25

Cc c tnh AC c m t trong cc hnh v sau:

Hnh 1.18 Chu k c b nh chng trnh ngoi

Hnh 1.19 Chu k c b nh d liu ngoi

Phm Hng Kim Khnh

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Gio trnh Vi iu khin

Tng quan v vi iu khin MCS-51

Hnh 1.20 Chu k ghi d liu b nh ngoi

Phm Hng Kim Khnh

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Gio trnh Vi iu khin

Tng quan v vi iu khin MCS-51

BI TP CHNG 1
1. Gii thch ti sao thng phi c in tr ko ln (pull-up) ti Port 0? Trng hp no khng cn s dng in tr ny? 2. Thit k mch gii m a ch dng 74LS138 cho 1 RAM 8 KB, 1 RAM 4KB v 1 ROM 16 KB. 3. Cho bn b nh sau:
B nh a ch RAM1 1000h 1FFFh RAM2 3800h 3FFFh ROM 8000h 9FFFh

Lp bn b nh y v thit k mch gii m a ch theo bn trn. 4. Cho mch nh hnh v. Xc nh a ch cc chn CS. Cho bit chn no dng c, chn no dng ghi.
DATA BUS
U14 21 22 23 24 25 26 27 28 10 11 12 13 14 15 16 17 30 29 P2.0/A8 P2.1/A9 P2.2/A10 P2.3/A11 P2.4/A12 P2.5/A13 P2.6/A14 P2.7/A15 P3.0/RXD P3.1/TXD P3.2/INT0 P3.3/INT1 P3.4/T0 P3.5/T1 P3.6/WR P3.7/RD ALE/PROG PSEN P0.0/AD0 P0.1/AD1 P0.2/AD2 P0.3/AD3 P0.4/AD4 P0.5/AD5 P0.6/AD6 P0.7/AD7 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 XTAL1 XTAL2 EA/VPP RST AT89C51 39 38 37 36 35 34 33 32 1 2 3 4 5 6 7 8 19 18 31 9 D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7 ALE 3 4 7 8 13 14 17 18 11 1 U16 D0 D1 D2 D3 D4 D5 D6 D7 LE OE Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 2 5 6 9 12 15 16 19 RD WR A0 A1 A2 A3 A4 A5 A6 A7

1 2 4 5 9

CS1

CS3

U15 74LS373 A5 A6 A7 VCC 1 2 3 6 4 5 A B C G1 G2A G2B Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 15 14 13 12 11 10 9 7

10 CS2 12 13 CS6 CS7 CS8

CS4

WR RD ALE

11

CS5

74LS138

Phm Hng Kim Khnh

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