BJT Circuit Analysis

Author: Email: Phone: Notes Status: Leigh Milner

lmilner@spri.levels.unisa.edu.au

(08) 8302 3805 Incomplete

Brief: This is an unauthori ed personal set o! notes on ho" to understand simple lo" !re#uenc$ anal$sis o! the %ipolar &unction Transistor. The in!ormation contained in these notes is correct to m$ 'no"ledge and ($ no means copied !rom an$ te)t(oo'* there!ore* no re!erences are re#uired.

The Start

The %ipolar &unction Transistor (%&T) is an e)tremel$ common electronic device to all !orms o! electronic circuits. It can (e used !or a num(er o! use!ul applications such as an ampli!ier* a s"itch* a (u!!er* an oscillator* a nonlinear circuit + so !orth. The %&T is made ($ , and - t$pe semiconductor material* "hich should (e !amiliar !rom the stud$ o! diodes. The %&T is a three terminal device (.ig /).
0ollector

%ase

1mitter Figure 1 The BJT

The three terminals are %ase* 0ollector and 1mitter. The emitter terminal al"a$s has an arro". The collector is al"a$s on the opposite side o! the emitter and the (ase is the other remaining terminal on the le!t. -ote that this is the conventional schematic diagram o! a %&T transistor. .urthermore* there are t"o t$pes o! %&T transistors. The$ are the -,- t$pe* and the ,-, t$pe. .igure 2 illustrates this2
c ( ( e , e c e c ( , ( , c e

(a) -,Figure 2 The two types of BJT

(() ,-,

The letters (* e* and c have (een used !or a((reviations !or the (ase* emitter and collector terminals respectivel$. 3n -,- transistor is al"a$s dra"n "ith the arro" pointing out"ards "hilst the ,-, transistor al"a$s has the arro" pointing in"ards. 3nd o! course* remem(er that the arro" is al"a$s the emitter terminal. 4o "hich t$pe is the transistor in .ig /5 + It is -,-. The other diagrams sho"n in .igure 2 illustrate "h$ the transistors are called either -,- or ,-,. It6s simpl$ due to the semiconductor material used !or each terminal. -o"* lets ta'e a more detailed loo'2 Ic I( I( Ie

Ie

Ic

Figure 3.

The arro"s sho" the direction o! 70 current !lo" !or (oth the -,- and ,-, cases. In (oth cases the (ase current (I() is a ver$ small current in the order o! microamps "hilst the collector current (Ic) and emitter current (Ie) are larger and in the order o! milliamps. -ote that !or the -,- transistor* the (ase current !lo"s into the transistor (ut !or the ,-, transistor* the (ase current !lo"s out the transistor. 3lso note Ic and Ie al"a$s !lo" in the same direction and in the direction o! the ((lac') arro"* the same arro" that tells us "hether the transistor is ,-, or -,-. -o" !or the voltages2
8( 8c

8e

The voltage at the (ase is normall$ "ritten as 8(. The voltage at the collector is normall$ "ritten as 8c. The voltage at the emitter is normall$ "ritten 8e. That part "as eas$* (ut "hat a(out the voltage (et"een the collector and the emitter5 Is it "ritten as 8ce or 8ec5 The convention is that the !irst su(script letter is the voltage that $ou are measuring and the second su(script letter is the re!erence. That means* i!2 8c 9 :8 (The voltage at the collector is 6 volts) 8e 9 28 (The voltage at the emitter is 2 volts)
2

Then 8ce is ;8 (ecause the voltage at the collector is ;8 higher than the voltage at the emitter. 3lso* 8ec 9 <;8 (ecause the voltage at the emitter (measuring point) is ;8 lo"er than the voltage at the collector (re!erence point). This concept is important and I! $ou6re a (it lost read it again. The !ollo"ing diagram should summari e. This is the convention used !or measuring voltages (et"een terminals o! the -,- and ,-, transistors. The reason !or this is that in these e)amples the !irst su(script letter is usuall$ o! higher voltage than the second* hence all varia(les listed (elo" "ill have positive values.
8c( 8e(

8ce 8(e 8(c

8ec

Figure 4.

Transistor DC Parameters

There are some important e#uations "e need to loo' at !irst. =ecall that >ircho!!s 0urrent La" (>0L) states that the sum o! all currents entering a node (a point) must e#ual the sum o! all currents leaving the node. %$ ta'ing a loo' at .ig 3 "e can see then that !or (oth the -,- and ,-, transistors2 Ie 9 Ic ? I( (/) i.e. Current flowing into the transistor (Ic and Ib) equals current flowing out of the transistor (Ie) for the ! " and Current in (Ie) equals current out (Ic and Ib) for the ! !.

There is a parameter called (%eta) !or ever$ transistor* "hich is a constant. The value o! !or transistors is normall$ (et"een 50 + 500. 1#uation 2 states that the collector current is times (igger than the (ase current. @ence is simpl$ a ratio (et"een collector and (ase current. =ecall that the (ase current is relativel$ small and the collector current is relativel$ large. Ic 9 .I( (2).

#or a transistor with a 9/00 and Ic$%m&" then from equation 2" Ib $ %'u&. (un through this in )our head to ma*e sure+ Ae can no" su(stitute e#uation 2 into e#uation /2 The highlight shows the substitution Ie 9 .Ib ? I(* "hich simpli!ies to2 Ie 9 (?/)I(. (3) Ae can no" su(stitute e#uation (2) into e#uation (3) to o(tain2

I( 9 IcB

(equation 2 rearranged)

Ie 9 (?/).Ic, * and rearrange to o(tain2

Ic =

( + /)

Ie

Ae no" de!ine a ne" parameter (alpha) "here

= +/

(;)

@ence2 Ic 9 .Ie. (5)

3nd that6s it. I highl$ recommend $ou go through the mathematics $oursel! and veri!$ ever$ step that I have done. Cnl$ a!ter $ou do this "ill $ou !ull$ understand. In summar$ $ou should de!initel$ tr$ to remem(er the !irst t"o !ollo"ing e#uations as the$ crop up all the time. It6s also hand$ to remem(er the third one.

Ic = .Ib Ie = (+1)Ib = /+1

-.g. #or the transistor with $ %''" $ %'',(%''.%) $ '.// @ence !rom e#uation 5 $ou can see that Ic Ie. This is true !or all transistors "ith high . -o" ta'e a loo' at the -,- transistor in .igure 3 again. The reason Ic is onl$ appro)imatel$ e#ual to Ie is (ecause o! the small (ase current that adds in to ma'e Ie Dust a little (igger. Eou are no" read$ to do 70 anal$sis o! transistor circuits2

DC Analysis

The 70 3nal$sis o! transistor circuits involves solving !or all (or most o!) the currents and voltages in the circuit. The most important 70 parameters to solve are Ic and 8ce. There is a de!inition called the FG<pointH o! a transistor* "hich is simpl$ the 8alues o! Ic and 8ce that are present in the transistor circuit. 4o i! $ou are ever as'ed to !ind the G point o! a transistor* solve !or Ic and 8ce. Lets loo' at the !ollo"ing circuit in .igure 5 overlea!. I6ve named the resistors =(* =c and =e to mar' the (ase* collector and emitter resistances respectivel$. 8cc is usuall$ used !or the po"er suppl$ voltage and the ground s$m(ol is also sho"n. The !irst step in the 70 anal$sis o! an$ transistor circuit is to solve !or one o! the un'no"n currents* i.e* Ic* Ie or I(. I! $ou solve !or one o! these un'no"ns* the other t"o can (e !ound Dust (u$ using e#uations 2 and 3 and the given value o! . The recommended "a$ o! solving !or one o! the currents is to "rite a >ircho!!s 8oltage La" (>8L) loop. =ecall that >8L states the sum o! all voltages
8a

8/

82 ;

around a closed loop e#uals ero. The !igure on the previous page also sho"s that the total voltage (et"een a po"er suppl$ and ground is e#ual to the sum o! voltage drops across components in a series connection to ground. I! that "as a (it too much to s"allo"* loo' at the !igure again2 8a 9 8/ ? 82. 3ppl$ing this principal* and Chms la" ("hich states that the voltage drop across a resistor is e#ual to the resistance multiplied ($ the current) "e can "rite the loop as !ollo"s !or the path through the (ase o! the transistor to ground2 8cc 9 I(.=( ? 8(e ? Ie.=e (:) "note that each term has the units of volts.

&lso note that if instead of being connected to ground" if (e was connected to another voltage su00l) (12) the equation would be: 1cc $ Ib.(b . 1be . Ie.(e . 12 8cc =c
8c

Ic

=(

I(

1be Ie

8e

=e
ground (31)

Figure 5.

It is no" an appropriate time to mention that 8(e is appro)imated as a constant o! 0.I8 !or transistor circuits. This is (ecause the %<1 terminals !orm a !or"ard (iased ,Dunction* and $ou should recall that a !or"ard (iased ,- Dunction has appro)imatel$ a 0.I8 voltage drop !rom diode theor$. @ence "ith 8cc* =(* =c* and =e given and 8(e90.I8 assumed* the onl$ un'no"ns are Ie and I(. =emem(er that e#uation 3 sho"s a relationship (et"een Ie and I(5 Ie 9 (?/)I( (3)

Ae can su(stitute this into e#uation (:) !or Ie to o(tain2 8cc 9 I(.=( ? 8(e ? (.%)Ib .=e (I)

and hence "e can solve !or I(2

1cc 1be = Ib( (b + ( + /) =e) 1cc 1be Ib = (b + ( + /) =e

.or t$pical values o! 8cc9/28* 8(e90.I8* 9/00* =( 9 /00' and =e 9 /' Ae o(tain2
Ib = /2 0.I = 5:.2 & /00 /0 + (/00 + /)./ /0 3
3

and no"2 Ic 9 .I( 9 /00 5:.23 9 5.:2m3 also remem(er that !or large * /* hence2 Ie 9 Ic 9 5.:2m3* and hence all the currents are solved. -e)t "e can solve !or the voltages2 The voltage at the collector (8c) is simpl$ the suppl$ voltage minus the voltage drop across the collector resistance. 4ee .ig 5. @ence2 8c 9 8cc < Ic.=c. (8)

If )ou cant remember whether the signs in the equations for a 415 loo0 should be 0ositive or negative" 6ust wor* out the direction of current and remember that the voltage arrow goes in the o00osite direction:
I

0ontinuing our e)ample* !or =c 9 500 ohms* 8c 9 /2 < 5.:2m3 500 9 /2 < 2.8/ 9 J./J8 and o! course* the voltage at the emitter is simpl$ the emitter resistance multiplied ($ the emitter current2 8e 9 Ie.=e 9 5.:2m3 /' 9 5.:28 !inall$* 8ce 9 8c < 8e 9 J./J < 5.:2 9 3.5I8 @ence the G<point o! this circuit is 8ce 9 3.5I8* Ic 9 5.:2m3.

@ereKs another e)ample. The (ase o! the transistor is connected to a voltage divider circuit (et"een 8cc and ground. 3lso note that the emitter is (iased "ith a suppl$ voltage 8ee. In this e)ample "e "ill use a negative suppl$ o! 8ee 9 <58. 8cc =c

Ic

=/

8(

=2
Ie

=e 8ee

Figure 6.

The simplest "a$ o! solving this circuit is to Dust calculate the voltage 8( using the voltage divider rule and proceed "ith a >8L loop !rom 8(* do"n to through the transistor to 8ee. @o"ever* this method assumes that the small (ase current I( !lo"ing into the transistor is actuall$ ero* and hence introduces a small error in the results. 4uch an error can (e negligi(le in circuit design. IKll step $ou through the process2 .rom inspection o! the circuit $ou can see that the voltage 8( is actuall$ Dust the voltage across resistor =2 since =2 is connected to ground. I remem(er the voltage divider rule ($ a phase that goes KThe one $ou "ant* over the sum o! the other t"oK. %$ that I mean the resistors. The e#uation !or !inding 8( using the voltage divider rule is2
1b = 1cc (2 (/ + ( 2

(J)

@ence the voltage 8(* "hich is the voltage across =2* is 8cc multiplied ($ the one $ou "ant (=2) divided ($ the sum o! the other t"o (=/ ? =2). .or 8cc 9 /28 as (e!ore * and =/933'* =2 9 /0'.
1b = /2 /0* * /0 = /2. = 2.IJ1 /0* + 33* ;3

-e)t $ou can "rite the loop through the transistor2 8( 9 8(e ? Ie.=e ?8ee* and solving !or Ie*

1b 1be 1ee =e 2.IJ 0.I ( 5) Ie = = I.0Jm& /* Ie =

!rom here it is simple to solve !or the remaining currents and voltages as sho"n (e!ore. @o"ever* note that 8e 9 Ie.=e ?8ee 9 I.0Jm /' ? (<5) 9 2.0J8. This answer could have been negative if the emitter resistance was a little smaller. -o"* the second method !or solving this circuit is to model the (ase divider as a Thevenins e#uivalent circuit. 8cc =c =(
8(

8cc =c

Ic

8(

Ic

=/

=2
Ie

=e 8ee

Ie

=e 8ee

Figure 7.

The thevenins voltage source is Dust the voltage at the point o! interest* "hich is 8( in series "ith the e#uivalent resistance o! the circuit* "hich is denoted =(. 8( is !ound ($ using the voltage divider rule as (e!ore* and =( is Dust =/ in parallel "ith =2. To 'eep these notes short I "onKt go into this (ut $ou can derive these results !rom Thevenins theorem !rom previous su(Dects. 4o* !rom (e!ore2
1b = 1cc (2 (/ + ( 2

and =( 9 =/ LL =2 9 =/.=2B(=/?=2) or /B( /B=/ ? /B=2) 9 I.:I' !or =29/0' and =/933'. Ariting the same loops as in the !irst e)ample2 8( 9 I(.=( ? 8(e ? Ie.=e ? 8ee and su(stituting in e#uation 32 8( 9 I(.=( ? 8(e ? Ib(.%)=e ? 8ee

Ib =

1b 1be 1ee 2.IJ 0.I ( 5) = = :5.2 & * (b + ( + /) =e I.:I* + (/00 + /)./*

and hence Ie 9 (?/)I( 9 /0/ :5.2 9 :.52m3. -ote our previous method produced a small error since the value o! Ie o(tained "as I.0Jm3. 3gain* the error "as due to the !act that the (ase current "as assumed to (e ero in the !irst method. Cne last circuit "orth mentioning is the K4el! %iasK. ItKs "orth mentioning (ecause ItKs a little tric'$ i! $ou havenKt tried it (e!ore* and especiall$ i! it crops up in a test. 8cc =c
8c

Ic

=(

Ie

=e 08

Figure 8.

Aithout too much detail* all $ou have to do is use the 8aria(le 8c in t"o e#uations2 8c 9 I(.=( ? 8(e ? Ie.=e 8c 9 8cc < Ic.=c. solve e#ual to each other2 I(.=( ?8(e ?Ie.=e 9 8cc < Ic.=c* 4u(stitute in !or I(2 I(.=( ? 8(e ? (?/)I(.=e 9 8cc < I(..=c and rearrange !or I(2
Ib = 1cc 1be * and the circuit is then easil$ solved. (b + ( + /) =e + . (c

AC Circuit Analysis
J

30 anal$sis is prett$ tric'$ to get a grasp on an !irst (ut "ith a good understanding o! the principals and a (it o! practice itKs a piece o! ca'e. I pre!er to use the @$(rid model !or 30 anal$sis (ut there are other models e#uall$ as valid. The @$(rid model !or the transistor is sho"n (elo"2 r
0ollector %ase i( 0ollector

r
%ase 1mitter 1mitter Figure 9.

gm.8

r is used to model the input resistance o! the transistor. ItKs actuall$ modelling the 30 resistance o! the !or"ard (iased %ase<1mitter ,- Dunction. v is Dust the voltage across r. 3lso note that the 30 (ase current* i(* !lo"s through r. Lo"er case letters are al"a$s used !or 30 signals. .or e)ample* i( is the 30 signal (ase current "hereas I( is the 70 (ase (ias current. The e)ception to this is 8* "hich I al"a$s seem to "rite using a captial 8* (ut thatKs Dust m$ personal choice. The diamond shaped (o) "ith the arro" is a K8oltage 0ontrolled 0urrent 4ourceK. ItKs important that $ou understand "hat this is. It is a current source* "hose current is controlled ($ a voltage "hich is some"here else in the circuit. In this case* the current is controlled ($ the voltage across r* "hich is 8. gm is Dust a constant "hich determines ho" much o! a change in current is caused ($ a certain change o! the controlling voltage. The units o! gm is amps per volt or* 3B8. &n e2am0le" for the voltage controlled current source shown above" a 1 of 71 0ea* to 0ea* with a gm of '.7&,1 would result in a current flow of: '.7&,1 2 71 $ 2.7& 0ea* to 0ea*. ItKs also "orth mentioning that !rom previous su(Dects* $ou learned that the resistance o! an ideal current source is in!init$. @ence "hilst the input resistance to the circuit is r* the output resistance o! the circuit is in!init$. In practice this is not true and the output resistance is Dust ver) large. This e!!ect is modeled ($ another resistor ro connected (et"een collector and emitter at the output (ut is not sho"n on the a(ove diagram. It can (e omitted as a simpli!ication to the model. 4o i! gm is a constant !or a given ampli!ier circuit* ho" do $ou "or' out itKs value. There is a relationship relating gm to the collector current* it is2

/0

gm =

Ic 1T

8T is another constant "hich is given ($2

1T = *T /.38 /0 23.300 4 = = 25m1 * a00ro2imatel) q /.: /0 /J

This e#uation should (e !amiliar !rom diode stud$. @ence2

gm = Ic Ic = = ;0. I c 1T 25m1

(/0)

4o all $ou have to do to !ind gm is to calculate the 70 current Ic and multipl$ ($ ;0* remem(ering the units should (e in 3B8. r is eas$ to calculate as "ell* it is given ($2
r =

gm

(//)

3nother use!ul thing to mention is that the 8oltage controlled current source* Mgm.8M is sometimes e)pressed in another !orm2
g m1 =

.1 = .i b

(/2)

* "here e#uation // has (een rearranged and

su(stituted in !or gm and then 8 B r is o! course Dust e#ual to i( <<N Eou can see this !rom ohms la" loo'ing at !igure J. The .i( model !or the voltage controlled current source comes in use!ul !or the Kcommon collectorK and Kcommon emitter "ith emitter resistorK ampli!iers. 4o thatKs the @$(rid model* all $ou have to do is replace the transistor in $our circuit "ith this model* and do some anal$sis.

3.1

Common Emitter Ampli ier

The common emitter ampli!ier is the simplest circuit and there!ore is presented !irst. The !irst thing $ou "ill note di!!erent a(out this circuit is the capacitors that have (een introduced. The hori ontal capacitors on the le!t and right are Dust 70 (loc'ing capacitors. The capacitors are assumed to (e large enough to (e short circuits to 30 signals. The vertical capacitor Doined to the emitter is "hat ma'es this circuit a K0ommon 1mitter 3mpli!ierK. The capacitor shorts out the emitter to ground !or 30 signals. Cther noticea(le !eatures o! the common emitter ampli!ier are that the input signal is applied to the (ase o! the transistor and the output is ta'en !rom the collector.

//

vo

8cc
short !or 30 Ic

=c
$ 0

=/
0 )

=2
Ie

=e

Figure 10 - o!!o" #!itter ir$uit

The !irst step in dra"ing an 30 Model is to short circuit the suppl$ voltage 8cc* "h$5 %ecause a 70 voltage suppl$ is a short circuit to 30 signals. This is something $ou Dust have to 'no" and learn < 3 70 suppl$ is a short circuit to 30 signals. M$ method !or dra"ing the 30 e#uivalent circuit is to start !rom the le!t and "or' to the right.
i( ) 8 8i $ 8o

=/

=2

gm.8

=c

e Figure 11 - % &o'e( of o!!o" #!itter ir$uit

.irst "e have the 30 signal source* "hich is on the le!t* then "e move right"ards. The coupling capacitor is a short circuit to 30 signals* hence it can (e ignored. Ae then move to the point (et"een the t"o resistors in !igure J. -otice that (oth o! these resistors is connected to ground. =2 is connected directl$ to ground and =/ is connected to ground via the po"er suppl$* hence (oth these resistors in .igure J appear in parallel to ground. Ae are no" at the (ase o! the transistor ) and are read$ to insert the @$(rid model !or the transistor < so thatKs "hat "e do. =emem(er that the emitter o! the transistor in .igure /0 is connected to 30 ground5 < ma'ing it a common emitter ampli!ier* this agrees "ith "hat is happening in .igure //. The emitter terminal is on the (ottom line "hich is ground. -o" "e get to the collector $ in !igure /0. -otice that =c is connected to ground via the po"er suppl$ on the top < this is the reason =c is connected to ground at point $ in .igure //. .inall$* the output coupling capacitor in .igure /0 is o! course a short circuit* and can (e omitted in .igure //. 3nd the output voltage should (e mar'ed in .igure // also.

/2

-o" that "e have dra"n the 30 e#uivalent circuit !or the common emitter ampli!ier* "e can do some anal$sis to determine the voltage gain o! the circuit.
=i i( ) 8 8i $ 8o =o

=/

=2

gm.8

=c

4tarting at the output "e notice that the current gm.8 is !lo"ing in a loop through =c. -otice that the direction o! current causes the voltage polarit$ across the resistor as indicated. This means that the output voltage (eing produced is negative (ecause remem(er* the (ottom line is ground. using ohms la"* "e can simpl$ see that2
8o 9 <(gm.8).

=c

(/3)

* current multiplied ($ resistance.

7C-T .C=O1T T@1 MI-P4 4IO-Q < "hich indicates that the voltage is negative. -o" "e can rearrange e#uation /3 a little2
1o = g m ( c 1

7o $ou notice that 8i 9 8 in the a(ove e#uation5 I hope so (ecause things in parallel al"a$s have the same voltage across them. 8 9 8i * hence*
1o = &v = g m ( c 1i

(/;)

This is the e)pression !or the voltage gain o! the ampli!ier. The input resistance o! the ampli!ier =i can (e seen !rom inspection to (e the parallel o! all the resistors in the le!t part o! the circuit* hence2 =i 9 =/LL=2LLr (/5)

The output resistance o! the circuit can (e seen !rom inspection to (e Dust =c* (ecause remem(er that the resistance o! an ideal current source is in!init$. 3nd an in!inite resistance in parallel has no e!!ect. =o 9 =c (/:)* This completes the common emitter ampli!ier* itKs eas$.
/3

3.2

Common Emitter !ith Emitter "esistance

The K0ommon 1mitter "ith 1mitter =esistanceK ampli!ier is slightl$ di!!erent !rom the 01 ampli!ier (3./) in that there is no emitter ($pass capacitor. The emitter is no longer at 30 ground. 8cc
short !or 30 Ic

=c
$ 0

=/
0 )

=2
Ie

=e

Figure 12 - o!!o" #!itter with #!itter resist*"$e.

The solution o! the (ias currents and voltages is o(viousl$ the same as !or the 01 case. The 30 model is a little di!!erent though* and re#uires a di!!erent approach.
i( ) $ 8o 8i

=/

=2

gm.8

=c

=e

Figure 13 - % &o'e( for # *!p with #!itter +esist*"$e.

3gain* as "e approach !rom the le!t "e have the 30 source* and the hori ontal 70 coupling capacitor is a short circuit to 30 and is hence omitted. 3t the (ase o! the transistor "e have the t"o resistors =/ and =2 connected to ground* remem(ering that =/ is also connected to ground (ecause the top 70 suppl$ 8cc is a short circuit to 30 signals* and remem(er o! course that "e are tr$ing to dra" and 30 e#uivalent circuit. 3t the (ase "e can insert the @$(rid< model !or the transistor. =emem(er that the emitter is -CT directl$ connected to 30 ground. The emitter is connected to ground via the emitter resistance =e. The rest o! the @$(rid< model includes the 8oltage controlled current source* and !rom the collector "e have =c going to ground (ecause

/;

8cc is a ground !or 30 signals. 3lso* the output coupling capacitor is omitted* and I needent repeat the reason !or this again.
i( ) $ 8o 8i

=/

=2

gm.8

=c

ie

=e

Figure 14

4tarting at the output* "e dra" a current arro" through the =esistor =c as "e did (e!ore !or the common emitter ampli!ier. .or the common emitter ampli!ier the current arro" "as Dust e#ual to gm.8 * (ut in this case it isnKt that o(vious. 0ould the current arro" instead (e ie * "hich is !lo"ing through the emitter resistor5 This is a (it con!using (ut it "ill soon (e e)plained. =emem(er that the (ottom line in the 30 model is ground. This means that points ) and $ are Dust ground. I! the current arro" dra"n "as ie* this "ould mean that ie "ould have to !lo" !rom points ) to $ in order to loop through and travel through =c. This is impossi(le (ecause once a current reaches ground* it sta$s at ground (disappears).
$ 8o

gm.8

=c

=e
Figure 15

3nother "a$ o! clearing up this con!usion "ould (e to dra" the circuit sho"n a(ove (onl$ output sho"n). In this cirucit* instead o! all the grounds Doined together "ith a common line on the (ottom* the$ are sho"n individuall$. (-ote that this is e)actl$ the same). It is there!ore visuall$ easier to see that the current arro" at the output is indeed Dust gm.8. The point I "anted to ma'e a!ter all that "as2 Dust remem(er that although the (ottom line is used to Doin up all the grounds at the (ottom* -C current can !lo" along this line. -o"* the e#uation !or 8o is e)actl$ the same as !or the common emitter circuit*
8o 9 < gm8.

=c(/I).

(ohms la" < current times resistance)

/5

=emem(er that the minus sign sho"s the voltage is more negative at the top o! the resistor compared to the (ottom o! the resistor ("hich is at ground). -o" !or 8i. Eou can see that 8i is e#ual to the voltage across r plus the voltage across =e (8e). Loo' at .igure /; and veri!$ this !or $oursel!. The t"o voltage arro"s sho" that the voltages Dust sum to e#ual 8i. < =emem(er that things connected in parallel have the same voltage across them. @ence "e can "rite* 8i 9 8 ? 8e. (/8) To "or' out 8e* "e have to !ind the current !lo"ing through the emitter resistance and simpl$ multipl$ ($ the resistance (ohms la"). < 8e 9 Ie.=e. Psing >ircho!!s 0urrent La" (>0L) at the emitter node* "hich states that the sum o! currents entering a node e#uals the sum o! currents leaving the node* "e can see that the emitter current ie is e#ual to the current !lo"ing through r plus the current !lo"ing !rom the K8oltage controlled current source (gm8).
$ 8o

i(
e

gm.8

ie
Figure 16

=e

There are t"o "a$s to proceed !rom here. Eou can use the gm.8 model !or the current source* "hich is sho"n in the a(ove diagram* or $ou can use the i( (e#uation /2* page //) model. I "ill sho" (oth "a$s* and that the gain o! the ampli!ier turns out to (e the same either "a$. The gm.8 "a$ !irst* using >0L* ie 9 8B r ? gm.8* -otice that 8B r has (een used !or the (ase current (ohms la"). Ae "ant to do this (ecause the current source has 8 in it* and this "ill allo" eas$ simpli!ication using alge(ra. Ae can no" su(stitute this ie into e#uation (/8)* noting that the e#uation 8e 9 Ie.=e has also (een used2 8i 9 8 ? (8B r ? gm.8).=e (/J)
/:

-o" "e are read$ to divide 8o ($ 8i and start simpli!$ing the e#uation2

1o = &v = 1i

g m1 (c 1 1 + ( + g m1 ) =e r

Eou can see that 8 is present in ever$ term in the a(ove e#uation* hence it can (e cancelled*
1o = &v = 1i g m .(c / / + ( + g m ) =e r

-e)t "e "ill use the rearranged version o! e#uation // to su(stitute in !or gm
gm =

.(c 1o r = &v = / 1i / + ( + ) =e r r

-e)t multipl$ top and (ottom line ($ r *

1o . (c = &v = (20) * and this is the ans"er. Ahen $ou are as'ed this 1i r + ( + /) =e #uestion in a test or e)am this is the result $ou should get. @o"ever* $ou ma$ simpli!$ the e#uation !urther "ill some assumptions2

=ecall that in the transistor circuits $ou have studied so !ar the collector current is in the order o! milliamps. Lets ta'e the e)ample o! Ic 9 /m3. Psing the same method as sho"n in e#uations /0 and //* $ou can calculate the r !or the circuit.
r =

gm

;0 Ic

/00 = 2.5* * this is !or a transistor "ith a t$pical (eta o! ;0m& B v

/00* "hich is close enough. @ence* !or most transistor circuits the r is in the order o! / to /0'. =ecall that the value !or =e in a t$pical circuit is in the order / to /0' also. -o" ta'e a loo' at the (ottom line o! e#uation 20. Eou can see that (ecause =e is multiplied ($ the (?/) !actor* it is much larger than r. (?/).=e NN r @ence (ecause the (?/).=e term on the (ottom line o! e#uation 20 dominates* r can (e ignored* @ence the e#uation can (e simpli!ied to2

/I

1o . (c = &v = 1i ( + /) =e 3lso note that +/ is / !or large * hence the e#uation !urther simpli!ies to2 1o (c = &v = 1i =e

(2/).

This result sho"s that the voltage gain o! the K0ommon 1mitter "ith 1mitter =esistanceK ampli!ier is appro)imatel$ e#ual to the e!!ective collector resistance divided ($ the e!!ective emitter resistance. I! $ou designed an ampli!ier li'e this "ith =c9/0' and =e9/'* the theoretical gain "ould (e </0* (ut note the actual gain o(tained in a real circuit "ould (e Dust a little less (ecause o! the assumptions made along the "a$ to o(tain e#uation 2/.

-o" "eKll solve the circuit again* (ut this time using the i( model !or the transistor*
$ 8o

i(
e

i (

Figure 17

ie

=e

This time IKll go through the maths a lot !aster* and let $ou "or' it out. i e 9 i ( ? i ( hence*

8i 9 i(.r ? (i( ? i().=e 8i 9 i(r ? i(.(?/)=e 8i 9 i((r ? (?/)=e) hence*

.i b .(c 1o = &v = 1i i b ( r + ( + /) =e)
1o .(c = &v = 1i r + ( + /) =e

* and no" i( Dust cancels o!!2

* and the result is the same as e#uation 20.

/8

Ta'ing a loo' at the 30 model again* "e can no" "or' out the input and output impedanceKs o! the ampli!ier.
i( ) $ 8o 8i

=/

=2

gm.8

=c

=e

The input impedance is simpl$ =/ in parallel "ith =2 in parallel "ith the resistance com(ination in gre$. Eou "ill notice that "e have r and =e in a series com(ination in the gre$ part. The challenge is to !ind the e#uivalent series resistance o! the t"o* and it isnKt Dust a case o! adding them together. The reason !or this is that the same current does not !lo" in each o! the transistors. Eou can onl$ sum t"o resistors in series i! the same current !lo"s in each o! the resistors* "hich is o! course "hat happens "hen $ou put t"o resistors in series. Technicall$ then* r and =e are not in series in the gre$ circuit a(ove.
=i i( Magic point

Figure 19

i((?/)

=e

=ecall that !rom e#uation 32 Ie 9 (?/)I(* The emitter current is (?/) times the (ase current. hence* 8i 9 i(r ? i(.(?/)=e (22)

-o"* the input impedance* sho"n ($ the arro" is Dust the voltage in divided ($ the current in. This is important to remem(er* it crops up all the time in these circuits. The impedance loo'ing into a stage is simpl$ the voltage in divided ($ the current in. 4ince 8i is the voltage in and i( is the current in then =i 9 8iBi(. @ence ($ rearranging e#uation 22* =i 9 8iBi( 9 r ? (?/)=e
/J

This is can (e summari ed ($ a rule called the (eta re!lection rule "hich states that2 < Ahen $ou move a resistance !rom the emitter to the (ase $ou must multipl$ it ($ (?/). < Ahen $ou move a resistance !rom the (ase to the emitter $ou must divide it ($ (?/). @ence $ou can see !rom inspection that =i is Dust r ? (?/)=e * (ecause the resistors are in series (technicall$) and "hen $ou move the emitter resistance !rom "here it is to up "ith r $ou must multipl$ it ($ (?/). I have heard o! some people calling this the magic point* I have no idea "h$. .inall$* the input impedance to the 30 circuit is2 =i 9 =/LL=/LL (r ? (?/)=e) The output impedance is the same as the common emitter ampli!ier* and !or e)actl$ the same reasons (please re!er). =o 9 =c.

3.3

Common Collector Ampli ier

This is also 'no"n as the emitter !ollo"er ampli!ier. It is loosel$ called this (ecause the 30 voltage at the emitter appro)imatel$ !ollo"s the 30 voltage at the (ase. 8cc
short !or 30 Ic Figure 20 $ 0

=/
0 )

=2
Ie

8o

=e

In the common collector ampli!ier the input is again applied to the (ase (ut the output is ta'en as the voltage across the emitter resistor. Eou "ill also notice that there is no collector resistor =c. The collector is at 30 ground* hence "h$ this circuit is called a common collector circuit.
20

i(

8i

=/

=2

8o

gm.8

(?/)i(

=e

The anal$sis is ver$ similar to the K0ommon 1mitter "ith 1mitter =esistance 0ircuitK* and I "onKt go into as much detail !or that reason. 8i 9 i(.r ? (i( ? i().=e 8i 9 i(r ? i(.(?/)=e 8i 9 i((r ? (?/)=e) The voltage out is Dust the voltage across =e* hence2 8o 9 i(.(?/)=e. -otice that unli'e the other ampli!ier studied so !ar* the e#uation !or 8o does not have a negative sign. Eou can see this (ecause the current !lo"s through =e !rom top to (ottom* "hich ma'es the voltage at the top o! the resistor higher than the voltage at the (ottom o! the resistor* @ence 8o is positive. The voltage gain is then2
i b ( + /) =e 1o = &v = 1i i b ( r + ( + /) =e)
1o ( + /) =e = &v = 1i r + ( + /) =e

* i( can again cancel !rom the top and (ottom line2

=ecall the simpli!ication (e!ore that (?/).=e NN r @ence* r can (e ignored !rom the (ottom line and the voltage gain (ecomes2
1o ( + /) =e = &v = =/ 1i ( + /) =e

2/

@ence the voltage gain !or the common collector ampli!ier is appro)imatel$ /. The input impedance is e)actl$ the same as !or the case o! the K0ommon 1mitter "ith 1mitter =esistanceK ampli!ier and is given ($2 =i 9 =/LL=/LL(r ? (?/)=e). ,lease re!er to pages /J and 20 !or an e)planation o! this. The output impedance is again !ound using the (eta re!lection rule. The result is2 =o 9 =e LL
r +/

* IKll e)plain this !uther in a later revision o! these notes* (ut itKs

getting late and I "ant to go to sleep......

22