Digital Systems

Basic Computer Organization & Design

Halzen Ashton Smith

Basic Computer Organization & Design

Instruction Codes Computer Registers Computer Instructions

Timing and Control

Instruction Cycle Memory Reference Instructions Complete Computer Description Design of Basic Computer Design of Accumulator Logic

Computer Organization

To implement a stored program computer which can execute a set of instructions. (A stored program computer behaves as different machines by loading different programs, i.e., sequences of instructions.)

Computer Organization, contd.

Computer hardware = registers + ALU + bus (data path) + control unit The computer goes through instruction cycles:

Fetch an instruction from memory Decode the instruction to a sequence of control signals Execute the decoded sequence of microoperations

Control unit: Instruction a timed sequence of control signals to trigger microoperations Input/output is implemented using an interrupt cycle

Introduction

Every different processor type has its own design (different registers, buses, microoperations, machine instructions, etc) The modern processor is a very complex device, which contains

Many registers Multiple arithmetic units, for both integer and floating point calculations The ability to pipeline several consecutive instructions to speed execution Etc.

However, to understand how processors work, we will start with a simplified processor model (similar to what real processors were like ~25 years ago) M. Morris Mano introduces a simple processor model he calls the Basic Computer We will use this to introduce processor organization and the relationship of the RTL model to the higher level computer processor

The Basic Computer

The Basic Computer has two components, a processor and memory The memory has 4096 words in it

4096 = 212, so it takes 12 bits to select a word in memory

Each word is 16 bits long

Store each instruction code(program) and operand (data)

CPU RAM
0

15

4095

Instructions (Instruction Codes)

Program

A sequence of (machine) instructions

(Machine) Instruction

A group of bits that tell the computer to perform a specific operation (a sequence of microoperation)

The instructions of a program, along with any needed data are stored in memory The CPU reads the next instruction from memory It is placed in an Instruction Register (IR) Control circuitry in the control unit then translates the instruction into the sequence of microoperations necessary to implement it

Instruction Format

A computer instruction is often divided into two parts

An opcode (Operation Code) that specifies the operation for that instruction An address that specifies the registers and/or locations in memory to use for that operation

In the Basic Computer, since the memory contains 4096 (= 212) words, we needs 12 bits to specify which memory address this instruction will use In the Basic Computer, bit 15 of the instruction specifies the addressing mode (0: direct addressing, 1: indirect addressing) Since the memory words, and hence the instructions, are 16 bits long, that leaves 3 bits for the instructions opcode
Instruction Format
15 14 12 11 Address I Opcode Addressing mode 0

Addressing Modes

The address field of an instruction can represent either

Direct address: the address in memory of the data to use (the address of the operand), or Indirect address: the address in memory of the address in memory of the data to use

Effective Address (EA)

The address, that can be directly used without modification to access an operand for a computation-type instruction, or as the target address for a branch-type instruction

Processor Registers

A processor has many registers to hold instructions, addresses, data, etc. The Program Counter (PC) holds the memory address of the next instruction to be read from memory after the current instruction is executed

Since the memory in the Basic Computer only has 4096 locations, the PC only needs 12 bits Instruction words are read and executed in sequence unless a branch instruction is encountered A branch instruction calls for a transfer to a nonconsecutive instruction in the program The address part of a branch instruction is transferred to PC to become the address of the next instruction To read an instruction, the memory read cycle is initiated, and PC is incremented by one (next instruction fetch)

In direct or indirect addressing, the processor needs to keep track of what locations in memory it is addressing: The Address Register (AR) is used for this

The AR is a 12 bit register in the Basic Computer

When an operand is found, using either direct or indirect addressing, the data stored in its effective address is placed in the Data Register (DR). The processor then uses this value as data for its operation

Processor Registers

The Basic Computer has a single general purpose register the Accumulator (AC) The significance of a general purpose register is that it can be referred to in instructions

e.g. load AC with the contents of a specific memory location; store the contents of AC into a specified memory location

Often a processor will need a scratch register to store intermediate results or other temporary data during processing; in the Basic Computer this is the Temporary Register (TR) The Basic Computer uses a very simple model of input/output (I/O) operations

Input devices can send 8 bits of character data to the processor The processor can send 8 bits of character data to output devices

The Input Register (INPR) holds an 8 bit character obtained from an input device The Output Register (OUTR) holds an 8 bit character to be sent to an output device

Basic Computer Registers

Registers in the Basic Computer
11 0

PC
11 0

Memory 4096 x 16

AR
15 0

IR
15 0 15 0

CPU

TR
7 0 7 0 15

DR
0

OUTR

INPR

AC

List of BC Registers
DR AR AC IR PC TR INPR OUTR 16 12 16 16 12 16 8 8 Data Register Address Register Accumulator Instruction Register Program Counter Temporary Register Input Register Output Register Holds memory operand Holds address for memory Processor register Holds instruction code Holds address of instruction Holds temporary data Holds input character Holds output character

Common Bus System

The registers in the Basic Computer are connected using a bus This gives a savings in circuitry over complete connections between registers

Common Bus System

The Basic Computer has eight registers, a memory unit, and a control unit. Paths must be provided to transfer information from one register to another and between memory and registers. A more efficient scheme for transferring information in a system with many registers is to use a common bus. The connection of the registers and memory of the Basic Computer to a common bus system:

The outputs of seven registers and memory are connected to the common bus The specific output is selected by mux(S0, S1, S2) :

Memory(7), AR(1), PC(2), DR(3), AC(4), IR(5), TR(6) When LD(Load Input) is enabled, the particular register receives the data from the bus Load input (LD): Enables the input of a register connected to the common bus Increment input (INR): Increments the contents of a register Clear input (CLR): Clear the contents of a register to zero

Control Input: LD, INR, CLR, Write, Read

Common Bus System

Three control lines, S2, S1, and S0 control which register the bus selects as its input
S2 S1 S0 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 Register x AR PC DR AC IR TR Memory

Either one of the registers will have its load signal activated, or the memory will have its read signal activated

Will determine where the data from the bus gets loaded

The 12-bit registers, AR and PC, have 0s loaded onto the bus in the high order 4 bit positions When the 8-bit register OUTR is loaded from the bus, the data comes from the low order 8 bits on the bus

Basic Computer Instructions

3 Instruction Code Formats:
Memory-Reference
15 14 12 11

Instruction
0

Opcode

Address

I=0 : Direct, I=1 : Indirect Register-Reference

15 14 12 11

Instruction
0

Register Operation

Input-Output
15 14

Instruction
12 11 0

I/O Operation

Symbol AND ADD LDA STA BUN BSA ISZ CLA CLE CMS CME CIR CIL INC SPA SNA SZA SZE HLT INP OUT SKI SKO ION IOF

Hex Code I=0 I=1 0xxx 8xxx 1xxx 9xxx 2xxx Axxx 3xxx Bxxx 4xxx Cxxx 5xxx Dxxx 6xxx Exxx 7800 7400 7200 7100 7080 7040 7020 7010 7008 7004 7002 7001 F800 F400 F200 F100 F080 F040

Description And memory word to AC Add memory word to AC Load memory word to AC Store content of AC in memory Branch unconditionally Branch and Save return address Increment and skip if zero Clear AC Clear E Complement AC Complement E Circulate right AC and E Circulate left AC and E Increment AC Skip next instruction if AC positive Skip next instruction if AC negative Skip next instruction if AC zero Skip next instruction if E is 0 Halt computer Input character to AC Output character from AC Skip on input flag Skip on output flag Interrupt On Interrupt Off

Basic Computer Instructions

Basic Computer Memory Reference Instruction Format

Indirect bit, bit 15 3-bit opcode, bits 14-12

23 = 8 possible instructions 212 = 22 210 = 4K = 4096 16-bit words

This leaves 12 bits for the address, bits 11-0

Memory-Reference Instructions
15 I 14 12 11 Opcode

(OP-code = 000 ~ 110)

0

Address

Instruction Set Completeness

A computer should have a set of instructions so that the user can construct machine language programs to evaluate any function that is known to be computable.
Instruction Types Functional Instructions:
- Arithmetic, logic, and shift instructions - ADD, CMA, INC, CIR, CIL, AND, CLA

Transfer Instructions:
- Data transfers between the main memory and the processor registers - LDA, STA

Control Instructions:
- Program sequencing and control - BUN, BSA, ISZ

Input/Output Instructions:
- Input and output - INP, OUT

Control Unit

Control Unit (CU) of a processor translates from machine instructions to the control signals for the microoperations that implement them Control units are implemented in one of two ways
1.

Hardwired Control

CU is made up of sequential and combinational circuits to generate the control signals A control memory on the processor contains microprograms that activate the necessary control signals

2.

Microprogrammed Control

We will consider a hardwired implementation of the control unit for the Basic Computer

Instruction Cycle

In the Basic Computer, a machine instruction is executed in the following cycle:

1. 2. 3.

Fetch an instruction from memory Decode the instruction

Read the effective address from memory if the instruction has an indirect address
Execute the instruction

4.

After an instruction is executed, the cycle starts again at step 1, for the next instruction Note: Every different processor has its own (different) instruction cycle The fetch and decode phases of the instruction cycle consists of the following microoperations synchronized with the timing signals (clocking principle).
T0: AR PC T1: IR M[AR], PC PC + 1 T2: D0, ..., D7 Decode IR(12-14), AR IR(0-11), I IR(15)

Instruction Cycle
T0: Since only AR is connected to the address inputs of memory, the address of instruction is transferred from PC to AR.
1. Place the content of PC onto the bus by making the bus selection inputs S2S1S0 = 010. 2. Transfer the content of the bus to AR by enabling the LD input to AR ( AR PC).

T1: The instruction read from memory is then placed in the instruction register IR. At the same time, PC is incremented to prepare for the address of the next instruction.
1. Enable the read input of the memory. 2. Place the content of memory onto the bus by making the bus selection inputs S2S1S0 = 111. (Note that the address lines are always connected to AR, and we have already placed the next instruction address in AR.) 3. Transfer the content of the bus to IR by enabling the LD input to IR (IR M[AR]). 4. Increment PC by enabling the INR input of PC ( PC PC + 1 ).

T2: The opcode in IR is decoded; the indirect bit is transferred to I; the address part of the instruction is transferred to AR. (See the common bus skeleton diagram.)

Instruction Cycle

Control circuit for instruction fetch

Determine the Type of Instruction

D'7IT3: D'7I'T3: D7I'T3: D7IT3:

AR M[AR], indirect memory transfer Nothing, direct memory transfer Execute a register-reference instruction Execute an input-output instruction

Instruction Cycle Memory Reference