CIS11 Chapter 4 Notes: von Neumann Model

Computer program: a set of instructions each specifying a well-defined piece of work for the computer
to carry out.

Instructions: is the smallest piece of work specified in a computer program.

John von Neumann proposed a fundamental model of a computer for processing computer programs in
1946.

The von Neumann model consists of five parts: memory; a processing unit, input, output, and a
control unit.

 Memory: Contains instructions and data.

 Processing Unit: performs arithmetic and logical instructions.
 Control Unit: Interprets instructions
 Input: transfers data into memory.
  Output: transfers data from memory to a device.

Memory
2k x m array of stored bits

Example: 256MB has 228 address space

Address: unique (k-bit) identifier of location

Content: m-bit value stored in location

Basic memory operations:

 LOAD: read a value from a memory location

1. Place the address of that location in the memory's address register (MAR), and then
interrogate the computer's memory.
2. The information stored in the location having that address will be placed in the
memory's data register (MDR).

Example:

To LOAD a location (A):

a. Write the address (A) into the MAR.

b. Send a “read” signal to the memory.
c. Read the data from MDR.

 STORE: write a value to a memory location

 1. Write the address of the memory location in the MAR, and the value to be stored in the
MDR.
2. Interrogate the computer's memory with the Write Enable signal asserted.
3. The information contained in the MDR will be written into the memory location whose
address is in the MAR.

Example:

To STORE a value (X) to a location (A):

a. Write the data (X) to the MDR.

b. Write the address (A) into the MAR.
c. Send a “write” signal to the memory.

Processing Unit
The processing unit in a modern computer can consist of many sophisticated complex functional units,
each performing one particular operation (divide, square root, etc.). The simplest processing unit, and
the one normally thought of when discussing the basic von Neumann model, is the ALU, known as
Arithmetic and Logic Unit.

The size of the quantities normally processed by the ALU is often referred to as the word length of the
computer, and each element is referred to as a word.

 In the LC-3, the ALU processes 16-bit quantities. LC-3 has a word length of 16 bits.
 Each ISA has its own word length, depending on the intended use of the computer.
 Most microprocessors today that are used in PCs or workstations have a word length of either
32 bits or 64 bits.

Registers: small, temporary storage of the processing unit.

 In charge of operands and results of functional units

 LC-3 has eight registers (R0, …, R7), each 16 bits wide

Input/ Output
Computer peripherals: keyboard, mouse, monitor, speaker…

 Each device has its own interface, usually a set of registers like the memory’s MAR and MDR
 LC-3 supports keyboard (input) and monitor (output)
o Keyboard: data register (KBDR) and status register (KBSR)
o Monitor: data register (DDR) and status register (DSR)
 Some devices provide both input and output: disk, network
o Program that controls access to a device is
usually called a driver.

Control Unit
Control Unit: Orchestrates execution of the program.
 C O N T R O L U N IT
PC IR

o To keep track of which instruction is being executed, the control unit has an instruction register
to contain that instruction. IR contains current instructions.
o To keep track of which instruction is to be processed next, the control unit has a register that
contains the next instruction's address.
o For historical reasons, that register is called the program counter (abbreviated PC), although a
better name for it would be the instruction pointer, since the contents of this register are, in
some sense, "pointing" to the next instruction to be processed.

Control unit:

• reads an instruction from memory

 the instruction’s address is in the PC

• interprets the instruction, generating signals that tell the other components what to do

 an instruction may take many machine cycles to complete

Instruction Processing
The central idea in the von Neumann model of computer processing is that the program and data are
both stored as sequences of bits in the computer's memory, and the program is executed one
instruction at a time under the direction of the control unit.

Instruction: the fundamental unit of work.

Three basic kinds of instructions:

o computational instructions (ADD, AND, …)

o data movement instructions (LD, ST, …)
o control instructions (JMP, BRnz, …)
Instruction Processing:

Not all phases are needed by every instruction phases may take variable number of machine cycles

The most basic unit of computer processing is the instruction. It is made up of two parts:

a. opcode (what the instruction does)

 Operations to be performed.
b. operands (who it is to do it to).
 Data/locations to be used for the locations.
1. An instruction is encoded as a sequence of bits. (Just like data!)
Often, but not always, instructions have a fixed length,
such as 16 or 32 bits.
2. Control unit interprets instruction: generates sequence of control signals to carry out operation.
3. Operation is either executed completely, or not at all.

A computer’s instructions and their formats is known as its Instruction Set Architecture (ISA).

Example: LC-3 Add Instructions

1. LC-3 has 16-bit instructions.

Each instruction has a four-bit opcode, bits [15:12].

2. LC-3 has eight registers (R0-R7) for temporary storage.

Sources and destination of ADD are registers.
“Add the contents of R2 to the contents of R6, and store the result in R6.”

Example: LC-3 LDR Instructions

Load instruction -- reads data from memory

Base + offset mode:

a. add offset to base register -- result is memory address

b. load from memory address into destination register

“Add the value 6 to the contents of R3 to form a memory address. Load the contents of that memory
location to R2.”

FETCH
1. Load next instruction (at address stored in PC) from memory into Instruction Register (IR).
2. Copy contents of PC into MAR.
3. Send “read” signal to memory.
4. Copy contents of MDR into IR.
5. Then increment PC, so that it points to the next instruction in sequence; PC becomes PC+1.

DECODE
In LC-3, this is always the first four bits of instruction.

• A 4-to-16 decoder asserts a control line corresponding to the desired opcode.

• Depending on opcode, identify other operands from the remaining bits.

Example:

o for LDR, last six bits is offset

o for ADD, last three bits is source operand #2
FETCH OPERANDS
Obtain source operands needed to perform operation.

Examples:

o load data from memory (LDR)

o read data from register file (ADD)

EXECUTE
Perform the operation, using the source operands.

Examples:

o send operands to ALU and assert ADD signal

o do nothing (e.g., for loads and stores)

STORE RESULT
Write results to destination (in register or memory)

Examples:

o result of ADD is placed in destination register

o result of memory load is placed in destination register
o for store instruction, data is stored to memory
o write address to MAR, data to MDR
o assert WRITE signal to memory

Changing Sequence of Instructions

In the FETCH phase, we increment the Program Counter by 1.

What if we don’t want to always execute the instruction that follows this one?

Examples: loop, if-then, function call

Need special instructions that change the content of the PC, known as control instructions.

o jumps are unconditional -- they always change the PC

o branches are conditional -- they change the PC only if some condition is true (e.g., the result of
an ADD is zero)

Example of JMP Instructions in LC-3:

Set the PC to the value contained in a register. This becomes the address of the next instruction to
fetch.
“Load the contents of R3 into the PC.”

Control Unit State:

Control unit will repeat instruction processing sequence as long as clock is running.

If not processing instructions from your application, then it is processing instructions from the Operating
System (OS).

The OS is a special program that manages processor and other resources.

To stop the computer:

o AND the clock generator signal with ZERO

o When control unit stops seeing the CLOCK signal, it stops processing.